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By Billy L. Crowder, John M. Fairfield

The implantation of B+ , P+, and As&apos; into silicon has been studied with the purpose of making shallow p-n junctions. The influence of such parameters as 1) ion energy, 2) target orientation and temperature, 3) total dose, and 4) annealing schedule was investigated. An energy range of 70 to 300 kev was used for boron and phosphorus implants and up to 500 kev for arsenic. It is found that the experimental projected range agrees well with theory and that shallow junction depths can be made reproducibly. ION implantation has received much attention recently as a technique for doping semiconductors. Specifically, it has the potential of supplementing or replacing the diffusion process as a method for making p-n junctions. In a few specific cases it has been used successfully to make semiconductor junction devices. Potential advantages of ion implantation doping over diffusion techniques are: 1) It affords greater control of shallow junction depths (< 0.2 µ) while maintaining high peak concentrations. This is particularly important for high-speed switching devices, since lower junction capacitances and resistances can be achieved. 2) More precise registration of small planar structures can be realized if proper masking procedures are employed. This advantage is especially useful in the design of high-density integrated circuits. It has been used to advantage in FET fabrication since the edge of the source or drain can be aligned precisely at the edge of the gate electrode.&apos; 3) Ion implanatation permits lower temperatures than diffusion techniques. This factor alleviates the problem of compatibility of diffusivities often encountered when designing multiple-junction structures. Also, the lower temperatures create fewer thermal defects and dislocations, which may account for the high efficiency of some ion-implanted solar cells.2 4) Impurity profiles can be more easily tailored to resemble ideal distributions. Successful exploitation of the potential advantages of ion implantation techniques will depend on increased knowledge and understanding of the subject. The factors likely to be influential in determining impurity distribution profiles in ion-implanted single-crystal targets have been reviewed by J. F. Gibbons.3 In addition to the mass and energy of the implanted ion, the total dose, target orientation, and target temperature are important parameters. The annealing temperature required for removing lattice damage and incorporating the implanted species on an electrically active site is very important. This paper describes an investigation of some of these factors. Implants of boron, phosphorus, and arsenic into silicon have been studied. Energy ranges of 50 to 300 kev were used for boron and phosphorus and up to 500 kev for arsenic. In addition to the implantation energy, the effects of total dose, target temperature, and post implant anneal have been investigated. EXPERIMENTAL PROCEDURE The implantation targets were silicon wafers cut from Czochralski-grown crystals, lapped, and chemically polished. The orientations were (111), (110). and (100) with misorientations of up to 7 deg from the principal axis. For this study, accurate target alignment (i.e., within 0.1 deg) was not available and quoted misorientation values should be regarded as approximate . The implantation equipment consisted of an ion source, a 300-kev linear accelerator tube, an electromagnetic separator, and the associated target supporting and beam focusing assemblies. The ion source was a simple oscillating electron type source,4 which has been described elsewhere.5 The gaseous compounds BF3, PF5, and AsH3 were used as ion sources for B+, P+, As+, and AS+&apos;. Analyzed current levels of up to 20 pamp could be obtained; however, for this investigation target current levels of 1-3 µ amp were usually employed. The analyzed ion beam was collimated through a double slit (1.4 x 0.4 cm) and swept perpendicularly to the long axis of the slit such that an area of about 2 sq cm on each target was covered. Dosages of around 1015 cm-2 were normally employed, but smaller amounts were also used for comparison. A uniform flux density over the bombarded area was assured by the continuous use of profile monitors similar to those described by Wegner and Feigenbaum.6 Post-implant annealing was accomplished in an argon atmosphere in a temperature range of 600" to 950°C. It was not part of the purpose of this investigation to study the annealing kinetics; however, some isochronal and isothermal anneal experiments were conducted to determine the time and temperature necessary to render a reasonably high portion of the implanted ions electrically active (i.e., higher than 50 pct). Post-implant anneal temperatures of around 900° and 600°C were required for boron, and arsenic and phosphorus implants, respectively. Arsenic and phosphorus implants increased in conductivity rather abruptly at the proper anneal temperature of the isochronal curve, but boron increased more gradually over a wider range. Isothermal anneal curves were reasonably flat after 10 min, so an anneal time of 1/2 hr was used for the experimental results described below. The profiling techniques were: 1) neutron activation analysis, 2) differential sheet resistance,7 and 3) junction staining.8 The differential sheet resistance technique is commonly employed in this type of study. Its principal disadvantage is the uncertainty of the ef-

Jan 1, 1970

By Richard O. Carlson

Ions of p31 and B 11 were implanted in natural insulating diamond macles. The thin (-0.4µ) layers showed sheet resistances of 107 to 1011 ohm per sq and activation energies of 0.17 to 0.34 ev above room temperature. However, no Hall effect could be measured, indicating that mobilities were less than I to 10 sq cm per (v-sec). Such low mobilities may be due to excessive scattering due to radiation damage in the bombarded layer or to very high concentrations of active compensating impurities. Annealing did not materially change the room -temperature properties, but the temperature was limited to -800°C by surface graphitization, the latter process probably being accelerated by lattice damage in our diamonds arising from the ion bombardment. A weak n-type thermoelectric power was detected after p31 irradiation, but it cannot be presumed that we have made the phosphorus ions active as donors in diamond. The natural diamonds have a high and uncontrolled concentration of impurities and, when coupled with the radiation damage and graphitization problems, would appear to seriously limit the quality of semiconductor that we can presently achieve by ion implantation in diamond. ALTHOUGH diamonds are usually thought of as insulating in terms of their electrical conductivity, it was found about 15 years ago that natural semiconducting diamonds do occur rarely, and these were designated as type IIb diamonds. These p-type semiconducting diamonds were found to be dominated by an impurity level 0.37 ev from the valence band. Evidence today based on correlation of the concentration of acceptor states from Hall effect measurements with the impurity concentrations determined by neutron activation analysis point to aluminum as the dominant acceptor impurity.&apos; The compensating donor is believed to be nitrogen, which has a donor level 1.6 ev above the valence band.&apos; However, only a small fraction of the total nitrogen content in the diamond is electrically active. An infrared absorption band at 7.8 p and ultraviolet absorption near 4 ev have been associated with nitrogen, the former providing a quantitative measure of nitrogen content.3 The nitrogen content is -l020 cm-3 in insulating or type I diamonds, but is less than 10&apos;&apos; in natural semiconducting diamonds. Much of this nitrogen is distributed in platelets oriented in (100) planes and not atomically dispersed in the diamond lattice.4 Semiconducting diamonds have been deliberately formed by incorporating impurities into the graphite charge in the high-pressure apparatus used to form diamonds.5 These manufactured semiconducting diamonds are always p-type, and while some show the 0.37 ev level due to aluminum, most such samples have been ascribed to impurity banding effects.6 The best natural or manufactured semiconducting diamonds have hole mobilities near 1500 sq cm per (v-sec) at room temperature, and those with the 0.37-ev level can be analyzed to reveal an acceptor concentration of 3 to 8 X 1016 cm-3 and a donor concentration 3 to 10 times lower.&apos; NO bulk n-type diamonds have ever been reported, but the electron mobility has been measured as 1900 sq cm per (v-sec) by irradiating a diamond with ultraviolet to excite electrons out of the deep nitrogen donor level or other levels.7 New hope for the formation of n-type diamond has emerged from the ion-implantation method whereby desired impurities are introduced into a crystal lattice by bombardment with a high-energy beam of the impurity ion. It was found in the case of silicon that the usual donors such as phosphorus and arsenic and acceptors such as boron and gallium could be implanted into silicon. Wentorf and arrow&apos; produced semiconducting layers on diamonds by an ionic bombardment in a glow discharge at potentials of about 2 kv. The observed typeness from thermoelectric probing seemed to depend on the atmosphere gas (nitrogen, argon, or hydrogen) rather than on the electrode material, but the nature of the conduction process in the thin damaged surface layer is completely unknown. A Russian group under Vavilov has attempted high-energy ion implantation in natural diamonds using boron and lithium ions9 and later also phosphorus, aluminum, and carbon ions.10 Their papers claim n-type layers from lithium, phosphorus, and carbon implant and a p-type layer from boron and aluminum implant, though the methods of type determination are not described in detail. Under government contract support, the Ion Physics Corp. has studied ion implantation in several semiconductors. While the bulk of their study1&apos; was devoted to the irradiation of silicon, they did carry out a short study on boron and phosphorus implantation into natural diamonds. They did observe surface conducting layers but did not determine the typeness of the layers. For our experiments, phosphorus and boron were chosen as the dopant ions because of their respective donor and acceptor behavior in germanium and silicon. Moreover, they are the lightest mass dopants of the shallow level donors and acceptors from columns 111 and V of the Periodic Table (excluding nitrogen which is already present in diamond), and will have the largest depth penetration into the diamond lattice. EXPERIMENTAL Diamonds. As the target diamonds for our ion implantation study, we chose commercially available macles, which are flat, twinned diamond crystals. By scanning through the stock of a wholesale distributor

Jan 1, 1970

By Martin Rubenstein

CdS crystals have been grown from a number of metallic solvents such as bismuth, tin, lead, and cadmium. Etching studies have shown that plastic deformation occurs if the crystals are not removed from the solvent prior to the solidification of the solvent, on cooling. The deformed crystals show a umique exciton fluorescence as a function of edge dislocation density. If one grows the CdS in the eutectic alloy of the above four metals (commonly called Wood&apos;s metal) the crystals can be removed from the solvent with hot water and no plastic deformation occurs. In this paper, the liquidus solubility measurements of CdS, as a function of temperature, are presented. The data were obtained using a high -temperature filtration technique. CADMIUM-SULFIDE crystals have been grown from a number of metallic solvents1 such as cadmium, bismuth, tin, and lead. Liquidus solubilities of CdS in cadmium,2 bismuth,3 and tin4 have already been measured. Crystals of CdS, in all four metals, have been grown by solution growth: 1) by cooling a saturated solution and 2) by a solution transport method.1&apos;"1 CdS crystals grown in these four solvents have a few characteristics in common: 1) 1.8°K photolumines-cent emission consisted mainly of the radiative recombination of the bound exciton commonly known as I,, 2) slip lines which could easily be seen by the naked eye, and 3) edge dislocation densities in the order of l05 per cu cm.1 It was decided that these slip lines and the high edge dislocation densities were caused by a plastic deformation of the CdS crystals. It was felt that this plastic deformation did not occur during the growth of the crystals nor during the cooling of the solution, but did occur when the solvent which was in contact with the crystals froze. If these assumptions were valid, the slip lines and the high number of dislocations could be reduced or eliminated by removing the crystals from the solvent before the solvent froze. Since crystals of CdS had already been grown separately in such solvents as bismuth, lead, tin, and cadmium, it was felt that crystals could be grown in a eutectic mixture of these four metals. In this work a eutectic (or near eutectic) mixture of bismuth, lead, tin and cadmium in the proportion 50, 26.5, 13.5, and 10 wt pct, respectively, was used to grow CdS crystals. Such a mixture has a melting point of about 70°C and is close in composition to the alloy commonly known as Wood&apos;s metals. If the crystals could be grown from this mixture of solvents, and if hot water (>75°C) could be used to separate the crystals of CdS from the metallic solvent, it was hoped that CdS crystals could be grown with little or no plastic deformation which had been ob- served when crystals were grown from these solvents uncombined. CdS crystals were grown from this low melting eutectic mixture of bismuth, lead, tin, and cadmium using the solvent transport method. CdS powder and the appropriate amount of metals were sealed in a quartz tube under a pressure of about 5 X 10-6 torr. This ampule was then placed in a vertical position in a furnace. The temperature was raised to about 900°C. The furnace was designed so that the top of the liquid column within the ampule was between 10° to 40°C higher than the bottom of the liquid column. These temperatures were measured on the outside of the quartz ampule. The ampule was maintained at temperature for 7 to 14 days (depending on the temperature at which transport was taking place) and then the furnace temperature was lowered until the temperature was about 125°C. The ampule was then removed from the furnace, placed in water maintained at about 90°C, and opened in this 90°C environment. The crystals could then be removed from this two-phase liquid (Wood&apos;s metal and water) by mechanically picking them out. Alternatively, the crystals could be quantitatively removed by adding an excess of mercury to the mixture of metals, crystals, and hot water. The hot solution of metals and the hot water could be evacuated using a small diameter tube connected to a vacuum. Small amounts of mercury and water could be removed by heating the crystals in vacuum. Crystals prepared using this technique showed no evidence of slip. However, some of these crystals did show edge dislocation densities as high as l04 per cu cm. Some few selected crystals showed no dislocations. Single crystals of CdS were grown as large as 5 by 5 by 0.5 mm. The ampules for the growth of these crystals were 13 mm O.D., 11 mm I.D., 150 mm! LIQUIDUS SOLUBILITY MEASUREMENTS The CdS starting materials was G.E. 118-8-2 powder which was fired in H2S at 1000°C, and then a vapor transport technique5 was applied to produce a "sound" mass of CdS. The Wood&apos;s metal was prepared by weighing out bismuth, lead, tin, and cadmium in the proportions of 50, 26.5, 13.5, and 10 wt pct, respectively. The bismuth, cadmium, and lead were from the American Smelting and Refining Co. (ASARCO) and all had purities of 99.999+ pct. The tin was 99.9999 pct spectroscopic grade from the Vulcan Materials Co. The appropriate mixture was placed in a quartz tube, evacuated to a pressure of 5 X 10-6 torr, melted to a liquid, cooled to room temperature under this same vacuum. This ingot was then placed in another quartz tube, evacuated to 5 x l0-6 torr, and sealed off under vacuum. The ampule was then horizontally placed in a furnace. The temperature was raised to 600°C, and over a period of several hours the ampule was vigorously shaken several times. The ampule was then removed from the furnace, and the metallic liquid was

Jan 1, 1970

By T. E. Seidel, A. U. MacRae

The dependence of the electrical and crystalline properties of silicon containing ion implanted boron atoms have been studied as a function of the incident dose, substrate temperature, and annealing tempera-ture. Hall effect studies show that the compensation due to defects is negligible after annealing at and above 500°C for a dose of 1013 ions per sq cm. Steps occur in the isochronal annealing curve for the sheet resistance at 300°C and 800°C and the mechanisms responsible for these steps are discussed. The range of the ions at 150 kev is 3500 * 5001. Electron diffraction studies on samples implanted with 150 ker ions show the existence of damaged (polycrystalline) silicon closer to the surface than the range of the ions. Etching and subsequent annealing of etched and unetched specimens suggest that the poly crystalline silicon is closer to the surface than the bulk of the distribution of ions. THE purpose of this study is to investigate some electrical and crystalline properties of ion implanted boron in silicon. Sheet resistance, Hall measurement, depth distribution by chemical staining, thermal probe and electron diffraction have been used to study the properties of samples implanted in a random direction with ions having energy up to 150 kev. The boron-silicon system has been the subject of considerable study&apos;-7 due to its possible application in the fabrication of electronic devices. The implanted ions produce considerable crystalline damage to the substrate crystal before they lose most of their primary energy and come to rest. Fortunately, most, if not all, of this damage can be removed by subsequent annealing or by holding the substrate at an elevated temperature during the implantation process. Sheet resistivity measurements of the p-type layers produced by boron implantation into room-temperature silicon, reveal that the annealing occurs in a two-step process: the first occurring at -300°C and the second at -800°C.&apos; Electron-microscope and low-angle electron diffraction studies of this damaged material indicate that the bombarding ions produce an amorphous silicon region about the trajectory of each ion.&apos; At high doses, these damaged regions overlap and an amorphous surface layer results. Furthermore, the 800°C annealing step, appears to be associated with the elimination of this gross damage. The depth distribution of the as-implanted and also the annealed samples have been studied by an angle lap and staining technique as well as by Hall measurements.3-7 We find the experimentally determined ranges of the boron are less than those calculated by the Lindhard-Scharff-Schiott theorys (hereafter referred to as the LSS theory). Our results are in essential agreement with pre- vious results. In addition, we have made Hall measurements on samples bombarded with a low dose (2 x 1013 ions per sq cm) to minimize impurity banding effects, and find that deep ionized levels influence the carrier concentration and room-temperature hole mobility until the sample is annealed at temperatures above 500°C. Above this temperature, the data corresponds to that obtained when silicon is doped with boron by conventional techniques. We have also made a depth distribution determination of the crystalline damage due to the implanted boron by using glancing angle electron diffraction techniques. It was found that the gross damage depth distribution of heavily implanted samples is closer to the surface than the depth distribution of the electrically active boron. By removing this gross damage, without affecting the distribution of the implanted boron, we have determined that the 800°C annealing stage is not exclusively due to the improvement in the crystalline perfection of the amorphous material but also appears to be associated with the annealing of some point defects. These results and their relation to previous results are discussed in the following sections. IMPLANTATIONS Boron ions were implanted into silicon samples using an accelerator capable of operating from 10 to 150

Jan 1, 1970

Jan 1, 1970

By E. I. Gordon

The electronic pickup tube is the image-to-video signal-converter or transducer in tele vision-like systems. Images may relate to visible light or IR excitation as in conventional TV systems, X-ray excitation as in some medical and production control applications, or electron excitation as in electron microscopy. The latter process is also important in some forms of light or X-ray sensitive pickup tubes as an intermediate step. In virtually all of these devices the image ends up as a stored charge pattern on a suitable target electrode and the video signal is created by periodically scanning the target with a low energy electron beam and removing the stored charge. In a major group of tubes radiation induced conductivity creates the charge pattern. In others, photoemission is used. In this paper an attempt is made to illuminate some of the device requirements placed on materials exhibiting radiation induced conductivity, some of the materials and techniques that are used, and the problems. The emphasis will be on visible light and IR sensitive targets although some attention will be given to X-ray and electron imaging. Photoconducting films as well as diode arrays will be discussed. ELECTRONIC pickup tubes find their greatest use in commercial, entertainment television, and in industrial and educational closed-circuit television. Video telephone systems, such as AT&T&apos;s PICTURE-PHONE System will become eventually the greatest user. Military use is also very important. Nevertheless the use of electronic pickup tubes in technology, science, and medicine is assuming ever greater relevance and demands the greatest diversity and perfection in the pickup tube art. Commercial television and closed-circuit television use requires visible light response, high resolution, low lag, and uniform response. Video telephone use requires the same plus extreme reliability, stability, and low cost. Military use emphasizes, in addition, sensitivity, IR response, and ruggedness. (Devices for far IR response will not be considered here.) The use of pickup tubes in medicine and biology emphasizes UV response for microscopy, X-ray response for radiology, and energetic electron response for electron microscopy. Astronomy and nuclear physics demands low light level response, storage ability, and resolution (here the tube is a successful replacement for film). The interested reader might profitably read Advances in Electronics and Electron Physics, vol. 12,&apos; 16,2 and 22A3 and 22B4 for detailed discussion of the use, properties, and technology of electronic pickup tubes. In general, because of the importance of these uses, none of the above properties will be ignored. Nevertheless attention will be restricted to only those imaging devices, called pickup tubes, using a scanning electron beam to dissect the image with a resulting video signal for conventional CRT display. However pickup tubes have become so complex that many of them include components such as image in-tensifiers which would be normally excluded by this restriction. Thus some of the other imaging devices will not be ignored entirely. We will first review the fundamental elements and physical phenomena involved in modern electronic pickup tubes, then the relevant materials and some of the material problems and then an interesting goal yet to be achieved. REVIEW OF PICKUP TUBE PRINCIPLES In all modern television systems using pickup tubes there is an interval called the frame interval, during which the incoming radiation flux is allowed to produce a cumulative effect in the form of a stored charge pattern which is a replica of the radiation image, and a scan interval during which the stored charge pattern is converted into a video signal. The frame interval bears no fixed relation to the scan interval and may be shorter or longer. In conventional, real time television the scan interval including retrace is identical to the frame interval. Integration and storage is the key to the sensitivity of modern pickup tubes, in contrast to earlier tubes such as the image dissector. At equivalent light levels and without integration, the number of photons contributing to the video signal in the image dissector is lower by a factor approximating the number of picture elements in the displayed image, a number of order 10. Statistical fluctuations in the number of contributing photons represent a serious limitation to the attainable signal to noise ratio, resolution and contrast. As a result considerably greater light levels have to be used then in targets which integrate over the full frame period. Thus the crucial elements, common to all modern pickup tubes, are the charge storage surface and the scanning electron beam which is incident on the charge storage surface at very low energy. These are shown in Fig. 1(a). The charge storage insulator is generally very thin with a thickness of several microns or less. The surface of the insulator is held near cathode potential. The backplate potential is held at cathode potential or at a small positive voltage relative to cathode. The combination of storage insulator and backplate electrode is commonly called the "target". In the absence of incident radiation flux the electron beam scans over the storage surface depositing negative charge uniformly over the scanned part of the surface by virtue of the fact that the effective secondary

Jan 1, 1970

By John W. Burd

A system is described for the simultaneous deposition of epitaxial layers on as many as eight substrates. A high degree of uniformity of both physical and electrical characteristics is achieved in the films. Variation of film thicknesses is consistently less than ±10pct within a wafer and from wafer to wafer within a run with the variation typically on the order of 55 pct. Composition variation of GaAs1-x PX layers within a wafer and from wafer to wafer within a run is consistently less than 51 pct. Electrical evaluation of the films by several techniques indicates excellent doping uniformity within a wafer and from wafer to wafer within a run. Mobilities for lightly doped GaAs films at 300°K are consistently >6000 cm2 v-1 sec-1 and mobilities > 7000 cm2 v- 1 sec-1 are regularly attainable. Techniques for the preparation of material with carrier concentrations from 1 x 1015cm-3 to 1 x 1019 cm-3 n-type and 5 x 1016 to 5 x 1018 cm-3 p-type are discussed. METHODS for the preparation of 111-V compounds by vapor phase reactions have been extensively reported in the literature.1-6 Almost all of the apparatus described for these various methods are suitable for processing one or at the most a very limited number of wafers simultaneously. With the recent rapid advances in the use of vapor grown GaAs for microwave oscillators and GaAs1-xPx as visible light emitters the requirements for these materials are steadily increasing. In order to satisfy these requirements it is necessary to move from a laboratory scale apparatus to one which is capable of processing a large number of wafers simultaneously. Desirable features would be a high degree of uniformity among the wafers and good reproducibility from run to run. The apparatus to be described fulfills these requirements very well. DISCUSSION The various methods reported in the literature can be classified under three headings: 1) closed tube, 2) open tube, and 3) the close-spaced method. Of these three the open-tube method is the most amenable for scale-up to a manufacturing process. It is the most versatile and the various operating conditions can be more precisely controlled than with the other two methods. A number of chemical reactions may be used to achieve vapor-phase growth of 111-V compounds. Sev-era1 of the more generally used reactions are shown in Fig. 1. All of these reactions have the following points in common: 1) generation of a volatile group III(Ga) species by the reaction of the transport agent (halide or HC1) with either Ga or GaAs, 2) introduction of the Group V(As and/or PI component, 3) a method of adding dopant, if desired, and 4) a region in which deposition from the vapor will occur and form as a single crystal epitaxial film on the substrates. The laboratory scale reactors permit the hot re-actant gases to flow into the relatively cooler deposition zone and pass successively over the several substrates which are arrayed along the long axis of the tube parallel to the gas flow. With this arrangement the composition of the reactant stream is continually changing as solid material is deposited on each successive substrate. As a result of this changing gas composition the reaction driving force also changes from substrate to substrate and the degree of uniformity of layer thickness, doping level, and so forth, is poor. This effect can be partially overcome by imposing a controlled temperature gradient along the deposition region to compensate for change in gas composition. However, even when this is done variations in layer thickness on the order of 30 to 40 pct are common and as high as 50 pct are frequently experienced between adjacent wafers in the tube. To expand this arrangement to a large number of wafers would only increase the nonuniformity from the first to last wafer in the line. From the above discussion the two undesirable features of changing gas composition and temperature gradient become evident. A reactor system which eliminates or minimizes these undesirable features is one in which the apparatus is mounted vertically as shown schematically in Fig. 2. The vertical mounting permits the disposition of a number of substrates on a suitable support so that all wafers are at the same vertical height in the furnace and hence at essentially the same temperature. By using only a single row of wafers the reactant gas mixture passes over only one substrate in its path through the reactor. Thus the two undesirable features of changing gas composition and temperature gradient are minimized. An additional design feature which further minimizes temperature variations is rotation of the substrate holder. Rotation serves to integrate any radial temperature gradient existing around the resistance heated furnace. A photograph of a reactor assembly at the completion of a run is shown in Fig. 3. MATERIAL PREPARATION Apparatus. Although any of the several chemical systems shown in Fig. 1 are adaptable for use in this apparatus the one generally used is System 2, the hydride synthesis system. This system has been de-

Jan 1, 1970

By W. G. Oldham

By monitoring the capacitance of abrupt p-n junctions it is possible to follow the motion of substitu-tional impurities. A p-n junction is formed by growth of silicon from an Al-Si alloy on an n-type silicon sutstrate at a temperature in the range 650" to 750°C. The diodes are etched and sorted for consistent V-I and capacitance behavior and separated into groups. After irradiation, each set with an unirradiated control set is annealed to various temperatltres for 10 mm and the capacitance remeasnred. For very heavily doped diodes (-1019 per cm3) observable capacitance changes occur at neutron fluences of >1015 per cm 3. The results may be interpreted in seceral ways, the simplest of which is to assume simple vacancy diffiision with small impurity -racancy interaction (at the diffiision, i.e. annealing temperature of 700°C). In this interpretation it is found that a typical vacancy makes about 1024 jumps and travels about 10-5 cm before disappearing. The required effective annihilation center density is about 1016per cm3 . Estimates of the vacancy-impurity interaction can be made and the above numbers correctecl, but for arty reasonable assumptions the number of vacancy sinks connot be much reduced. ThE complete annealing of radiation induced defects requires that the vacancies and interstitials either recombine, travel to the surface of the crystal, or travel to an annihilation center, e.g., a dislocation or a precipitate. If the interstitial is ignored except as a possible vacancy annihilation center at low temperatures,* the motion of vacancies may be followed by monitoring the corresponding motion of substitutional impurities. pfister2 has measured the enhanced diffusion of impurities in an asymmetric shallow diffused silicon structure by optically monitoring the junction movement. In these experiments we monitor instead the capacitance of a heavily-doped deep symmetric p-n junction. The sensitivity for this method is several orders of magnitude higher than in Pfister&apos;s technique, mainly for two reasons: 1) the junction capacitance of a heavily-doped junction is sensitive to impurity movements in the Angstrom range* com- and 2) the junction may be far from the surface which is a major annihilation center for vacancies. THE EXPERIMENT A p-n junction is formed by the epitaxial growth of silicon from an A1-Si alloy on a silicon substrate at a temperature in the range 650° to 750°C. The technique used is the transport of an aluminum melt through a temperature gradient.4 A 10-mil thick aluminum disc is sandwiched between two silicon wafers and the assembly raised to about 650° C with a temperature gradient normal to the sandwich. After about 8 hr the upper (hotter) wafer has been entirely transported and deposited epitaxially on the substrate wafer. The substrate and overgrowth resistivity are measured with a 4-point probe. The as-grown structure is lapped until the wafer is about 1/2 mm thick with the junction in the center. Contacts consisting of electroless nickel covered by electroplated rhodium are applied to both the p and n sides. The wafer is diced into square dice 1/2 to 1 mm on a side and the dice are etched sufficiently to remove approximately 1 mil of silicon. The following results are all for aluminum (p-side) and antimony (n-side) doped specimens with NA =3x 1018 per cm3, ND = 2-8 x 101A per cm3. The diodes are sorted for consistent V-I and capacitance behavior and separated into groups. After irradiation, each set with an unirradiated control set is annealed and the capacitance remeasured. A special capacitance measurement method is used to insure a low sensitivity to shunt resistance. The diode is voltage driven and the current monitored by a phase lock amplifier. It is possible to adjust the detector phase to a point where shunt resistances as low as 100 O have no effect on the reading. The diodes in this study have a capacitance in the range 1000 to 5000 picofarads and a shunt resistance in the range 100 to l06 O depending on the stage of the anneal. THEORY The theoretical problem is twofold: 1) The computation of the amount of impurity diffusion and hence the impurity profile resulting from a given amount of vacancy motion, and 2) the computation of the capacitance from the impurity profile. A comparison of the theoretical and experimental capacitance (in particular the changes) yields the amount of vacancy motion. Vacancy Motion. A convenient parameter to measure the total amount of vacancy motion is Jv the total number of vacancy jumps per unit volume. Although this parameter varies with position in the crystal, owing to vacancy annihilation at the surfaces, it is approximately independent of position far from the surfaces, i.e. in the junction region. In terms of the number of vacancies per unit volume Nv and the vacancy diffusivity given by

Jan 1, 1970

By Akinobu Kasami, Keiji Maeda, Makoto Naito, Masaharu Toyama

Gap electroluminescent diodes have been prepared by the vapor phase diffusion of zinc into n-Gap crystals which were grown from a gallium solution (10 wt pct Gap) doped with tellurium and Ga203. A marked improvement in the efficiency of the red electrolumines -cence has been achieved by heat treatment after diffusion. External quantum efficiencies of diodes annealed under optimum conditions are 0.2 to 0.6 pct at room temperature, or about 200 times higher than the efficiencies of diodes quenched after diffusion. The optimum dopant concentrations in the gallium melt from which the crystals were grown are 3to6 x at. pct Te and 4 to 8 x 10-2 mol pct Ga203. The efficient diodes are characterized by linearly graded junctions with an i-layer 0.1 to 0.2u thick. Annealing increases the emission intensity by a factor of 20 to 50 and decreases the current density to 1/3 to 1/8 that of quenched diodes at a given bias. The decrease in current is attributed to an annihilation of deep recombination centers in the depletion layer. The increase in emission intensity is interpreted in terms of an increase in lifetime of minority carriers and an increase in the relative intensity of red-to-infrared emission. The dependence of these quantities on the tellurium and oxygen doping levels is also discussed. A number of studies have been made of the red light emission from for ward-biased Gap diodes.&apos; At room temperature this emission band is centered at 7OOO? with a spectral width of nearly 1000?. Low-tempera-ture photoluminescence indicates that this emission is due to either the radiative annihilation of an exciton bound to a pair of zinc and oxygen atoms substituting on nearest neighbor lattice sites2,3 or the radiative recombination of an electron bound to this Zn-O pair with a hole bound to an isolated zinc shallow acceptor.3 An emission band is also observed with a spectral peak at 9800?. This infrared emission has been shown to be due to the recombination of an electron trapped at an isolated oxygen deep donor with a hole trapped at an isolated zinc acceptor.4 The red emission from Gap diodes is fairly efficient at room temperature because the nearest neighbor Zn-0 pair forms a deep electron trap at 0.3 to 0.4 ev below the edge of the conduction band.2&apos;4 In diodes grown by liquid epitaxy an external quantum efficiency of 2.1 x 10-2 (photon/electron) has been attained by heat treatment at relatively low temperatures.5 This heat treatment was found to increase the efficiency by a factor of 3 to 6. However, no detailed studies have-been reported on the effects of heat treatment. We can only cite Onton and Lorenz&apos;s work6 on the change ; in the relative intensity of red-to-infrared emission. Heat treatment has also been tried on junctions built in during growth, but contrary to expectations the efficiency decreased. In-diffusion is a simple and controllable method of fabricating p-n junctions. For Gap, zinc is generally used to form a p-type layer on n-type crystals. The emission efficiencies of in-diffused diodes are, however, extremely low in comparison with liquid epitaxial diodes.&apos; Although efficiencies as high as 2 x 1O-3 have been reported, values from 10-6 to 10-4 are generally obtained by typical diffusion techniques. Out-diffused diodes are known to be a little more efficient than in-diffused diodes. Nevertheless, the quantum efficiency is at most 7 x 10- 3 and ordinarily of the order of 10-4.8 NO results have been reported on heat treatment of either in-diffused or out-diffused diodes. This paper reports a marked improvement in the efficiency of the red emission observed for in-dif-fused diodes as a result of heat treatment after diffusion. The method described reproducibly yields diodes with external quantum efficiencies of 2 to 6 x 10-3. The observed dependence of efficiency on annealing time and on doping level will be discussed in terms of the lifetime of minority carriers and the formation of Zn-O complex pairs. EXPERIMENTAL A) Diode Fabrication. The n-Gap crystals used in this study were grown from a saturated gallium solution by a slow cooling method.8 The Gap content in the gallium melt was fixed to 10 wt pct corresponding to a growth temperature of about 1100 Tellurium was chosen as the n-type dopant and added to the melt in concentrations ranging from 0.001 to 0.06 at. pct. Oxygen was added in the form of Ga2O3, whose concentration was varied from 0.004 to 0.2 mol pct. The resulting crystals were platelets with well-developed (111) surfaces. Typical electrical properties were Hall mobilities of 130 to 30 sq cm per v-sec and carrier concentrations of 1016 to 10" cm-3 at room temperature. Diodes prepared from crystals with relatively low doping levels, in which u = 130 to 100 sq cm per v-sec and n = 0.6 to 6 x 1017 Cm-3, were examined in detail. The p-n junctions were produced in these n-Gap crystals by the diffusion of zinc from the vapor phase by the following procedure. The platelets were carefully lapped on both sides to a thickness of 150 to 200 u while maintaining the (111) orientation. After being etched in hot aqua regia, the crystals together with the zinc were sealed in an evacuated 12 mm ID quartz ampoule 20 cm long. The crystals and the zinc were then separated from each other at opposite ends

Jan 1, 1970

By A. E. Blakeslee

Morphological and electrical properties of GaAs epitaxial layers are influenced not only by changes in the nominal substrate orientation but also by small amounts of misorientation from the exact crystal planes. Deviations up to 5 deg from {11IA}, {11IB}, and (100) planes were investigated. Growth rates increase progressively with angle, approximately I u per hr per deg. Size and density of growth pyramids fall off with increasing angle, but other effects that are deleterious to the surface may occur which are heightened by increased misorientation. Carrier concentration decreases and electron mobility consequently increases as the angular offset increases, except in the case of strong compensation, where the mobility trend is reversed. It has long been known that changes in the crystallo-graphic orientation of the substrate may cause pronounced effects on the morphological properties of vapor grown semiconductor films. Reports of orienta-tion-dependent growth rates and surface characteristics are as old as the literature on epitaxy itself. shawl has recently published a comprehensive study of the dependence of growth rate on substrate temperature and orientation in epitaxial GaAs. It is also well-known that misorienting the substrate surface a few degrees away from the nominal low-index crystal-lographic plane often produces a much smoother epitaxial surface. This was reported by Tung2 for silicon, Reisman and Berkenblit3 for germanium, and by Kontrimas and Blakeslee4 for GaAs, and use is commonly made of this fact in the semiconductor industry to help guarantee smooth vapor deposits. The effects of substrate orientation on the carrier concentration and mobility of vapor grown GaAs were first documented by williams5 in 1964 and have been observed by several other authors since then,6,7 but no one has yet reported a careful study of how small changes influence these properties. We have made such a study and have found that sizable differences in growth rate, morphology, carrier concentration, and mobility can indeed be observed for epitaxial films grown on substrates that are oriented by progressive small increments away from the exact crystal plane. EXPERIMENTAL Early in the investigation an arsine synthesis system of conventional design8 was employed to produce growths on {111A}-oriented GaAs substrate crystals. In that early work, pronounced effects on carrier concentration and electron mobility were observed as a function of slight misorientation from this low index plane. That observation led to the more careful study that is reported here. An AsC13 system, differing in major aspect from those commonly in use today9 only in that the reactor is vertical rather than horizontal, was used for the detailed study. The gallium source was at 900°C and the substrates were at 750°C. The flow rate of pal-ladium-diffused H2 through the AsCl3 bubbler was 200 cu cm per min, and the flow rate of bypass H2 was also 200 cu cm per min. The substrates consisted of chro-mium-doped semiinsulating GaAs to facilitate elec-trical evaluation of the overgrowth by means of Hall and conductivity measurements on conventional eight-legged Hall bridges. They were misoriented by 0 to 5 deg from the {111A}, {111B}, and (100) planes, toward the (100) from the {111A} and {111B} and randomly toward the <111A> or <111B> from the {loo). The crystals were oriented for sawing by the Laue back-re-flection technique, which is good only to about ±1/2 deg; but after polishing or sometimes after epitaxial growth the wafers were checked by a diffractometer technique which is accurate to about * 0.1 deg. After lapping, the wafers were polished with NaOCl after the technique of Reisman and Rohr,10 and just before use they were cleaned in NaOC1, thoroughly rinsed with de-ionized water, and blown dry with nitrogen. Each run employed four wafers, each misoriented by differing amounts from one of the three major faces, and at least two runs were made for each orientation. The runs were continued long enough to provide at least a 15-µ or thicker layer. SURFACE MORPHOLOGY The appearance of all the films that were grown in a given run always changed from wafer to wafer as a function of increasing misorientation, but not always in the same regular fashion. At least three different trends were observed. These are more easily seen than described, and reference to the series of photo-

Jan 1, 1970

By R. W. Regehr, R. A. Burmeister

Epitaxial growth of GaAs 1-xPx on germanium substrates was achieved using an open tube vapor transport system. The compositional range of 0.3 < x < 0.4 was examined. The best results were obtained with (311) orientation of the germanium substrate. The physical and chemical properties of the resulting layers were investigated using several techniques. Spectrographic analyses of the layers indicate substantial incorporation of germanium into the GaAs t-X Px layer. Evidence is presented which indicates that this incorporation occurs via a vapor phase transport process rather than by solid phase dijfu-sion. Electrical measurements suggest that the germanium thus incorporated behaves predominantly as a deep donor in the compositional range of 0.33 < x * 0.40 and has a deleterious effect upon the luminescent properties of GaAs1-x Px. The increasing technological importance of GaAs1-xPx for use in light-emitting devices has led to an evaluation of several aspects of existing growth processes. The method most commonly used to prepare GaAs1-xPx for electroluminescent device applications is vapor phase epitaxial growth on GaAs substrates.&apos;-4 In a typical electroluminescent diode structure the active region of the diode is entirely within the epitaxial layer and thus the electrical properties of the substrate are relatively unimportant since it is effectively a simple series resistance (assuming hetero-junction effects to be negligible). The use of germanium rather than GaAs as the substrate material is of interest for several reasons. First, GaAs of reasonable structural quality has been epitaxially grown on germanium4-2 and it is reasonable to expect that GaAs1-xPx could subsequently be deposited on the GaAs layer. Second, germanium substrates are readily available with both lower dislocation densities and larger areas than GaAs. Finally, single crystals of germanium are more economical than GaAs single crystals. The principal objective of the present investigation was to test the feasibility of growing GaAs1-xPx epi-taxially on germanium substrates, and to evaluate the properties of such layers with regard to electroluminescent device requirements. The approach used was to a) demonstrate epitaxial growth of GaAs1-xPx on germanium, and b) characterize the relevant structural, electrical, and optical properties of the GaAs1-xPx layers. The possibility of germanium incorporation into the grown layers was of special interest since there was some indication of this in previous studies of GaAs growth on germanium.5&apos;11,12 Although a study of the electrical properties of germanium in GaAs1-xPx was not an intent of this investigation, several features of the electrical properties of the layers grown in the present study which appear to be due to germanium are described. EXPERIMENTAL PROCEDURE The open-tube vapor transport system used for the epitaxial growth of GaAs1-xPx is illustrated in Fig. 1. This system utilizes the GaC1-GaC13 transport reaction and is similar in most respects to the larger system described elsewhere.&apos; The germanium substrates were n-type, with a resistivity of 40 ohm-cm (Eagle-Picher Co.). These were cut to the orientations of {100), {111), and (3111, and were mechanically polished and chemically etched in CP-4 (5 min at 0°C) prior to growth. In some cases, a GaAs substrate was employed in addition to the germanium. The orientation of the latter was {loo}, and they were also mechanically polished and chemically etched prior to growth. The initial composition of the deposited layer was pure GaAs. After approximately 10 microns of GaAs was deposited on the germanium substrate, the phosphorus content of the layer was gradually increased over a distance of approximately 15 microns to the desired concentration and maintained at this value throughout the remainder of the growth. Typical operating parameters used during growth are given in Table I. Selenium was used as a n-type dopant in several runs to facilitate comparison of the electrical properties of the layers grown on germanium with those of layers grown on GaAs substrates, which are usually doped with selenium. The concentration of H2Se in the gas phase was adjusted to a value which would normally yield a carrier density of 1 to 5 x 101 7 at room temperature in layers grown on GaAs substrates. The terminal surfaces of the epitaxial layers were examined by optical microscopy for structural characteristics. Laue back-reflection photographs (Cu radi-ation) were also made on the terminal surface to verify the epitaxial nature of the deposit. After these steps

Jan 1, 1970

By James C. Word, R. M. McLouski

This paper will describe the development and application of large-scale integration techniques employed in the fabrication of a germanium multielement array. The array consists of 100 by 228 PNP bipolar transistors fabricated on 5 mi1 centers. Back-biased p-n junction techniques are used for electrical isolation of the individual elements. The end use of the array is a high resolution, large area IR sensor. The monolithic array is fabricated in 1 ohm-cm p-type germanium epitaxially deposited on 6 ohm-cm n-type substrate. Epitaxy was accomplished through the hydrogen reduction of germanium te trachloride. Di-borane was used as the dopant. Base regions are achieved by the diffusion of arsenic from doped oxide or arsine sources. Oxide-masking of the arsenic im-pzlvity was achieved by the chemical deposition of a boron doped glass. The emitter is formed by an aluminum alloy diffusion technique. Vacuum deposited aluminum is used for the emitter, interconnections, and for the contact and bonding pads. ALTHOUGH a great volume of literature pertaining to the development of large scale integration techniques (LSI) has been published for silicon and in particular silicon imaging applications,&apos; to date only a small number of similar devices have been constructed using germanium technology.&apos; Since the physical and chemical properties of germanium are vastly different from those of silicon, the fabrication technology for integrated structures in germanium is also different from that of silicon. In particular germanium does not possess a stable oxide as can be grown on silicon by heating in an oxidizing ambient for masking of dopants and passivation. This paper describes the application of germanium LSI techniques employed in the fabrication of a multielement infrared sensor array. The array is used in a high resolution, large area infrared sensor for operation in the 0.8- to 1.5-u spectral range. Back biased p-n junction techniques are used for electrical isolation of individual elements. Discrete germanium devices have been fabricated routinely for some time. However, mainly due to the lack of a suitable mask for selective doping and the high current leakages inherent in germanium p-n isolation, few monolithic germanium structures have been constructed. THE INFRARED MOSAIC A cross-sectional view of the array is shown in Fig. 1. The monolithic structure consists of 12,800 PNP transistor elements in a 100 by 128 matrix fab- ricated on 5 mil centers. The emitters of each line of transistors are connected together using aluminum interconnects while the strip collectors are connected together in series at right angles to the emitter lines. The selection of this structure is dictated by the readout technique involved. Access to each element transistor is obtained by applying a bias voltage to a particular collector strip and separately interrogating each emitter row. A charge storage, i.e., an integration mode is used for reading out this particular array Construction techniques available for use with germanium do not include a selective p-type diffusion capability for surface concentrations greater than 10" per cu cm and junction depths greater than about 10 u. This fact limits the type of structure that may be used. Therefore, an array of PNP transistors that did not employ p-type diffusions was chosen. The structure was fabricated by growing a 1 ohm-cm p-type epitaxial layer on a carefully prepared 6 ohm-cm n-type substrate. N-type dopants were used for the isolation and base diffusions and alloyed aluminum was used to form the emitter junctions. The array was then completed by evaporation of aluminum interconnections and contact pads. SUBSTRATE AND SUBSTRATE PREPARATION Germanium substrates of (111) orientation grown by both Czochralski and zone leveling techniques were utilized for mosaic fabrication. Czochralski substrates were preferred because of the lower dislocation densities available in this type of material. Dislocation densities for the Czochralski material were typically less than 3000 per sq cm, while those for the zone leveled material were typically less than 5000 per sq cm. All substrates were uncompensated to minimize thermal conversion problems in subsequent epitaxial and diffusion processing. Both in-house and vendor polished wafers were used. The in-house polishing technique employed consisted of an initial gross chemical etch in CP4 to remove saw damage from both surfaces. This was followed by a chemical-mechanical polishing operation of one side of the wafer. The chemical-mechanical polishing solution used was Lustrox 1000 (Tizon Chemical Co.), and consists of zirconium dioxide, sodium hypochlorite, water and a surfactant. The wafer thickness before and after polishing was typically 0.020 and 0.010 in, respectively. THERMAL CONVERSION The problem of thermal conversion of both the substrate and epitaxial layer was particularly acute because of the relatively low carrier concentrations employed in both regions. This problem has been encountered by other workers in the past.3 Without special treatment before epitaxial growth substrate conversion (n-type to p-type) and changes in the re-

Jan 1, 1970

By R. A. Burmeister, G. P. Pighini, P. E. Greene

An open tube vapor phase epitaxial growth system has been used for large area (multiple substrate) growth of GaAs1-xPx on GaAs substrates. The GaCl-GaCl transport reaction is used with either a GaAs or Ga (nonsaturated) source. Selenium and tellurium have been used for donor impurities, and zinc as an acceptor. The useable substrate area in this system is approximately 20 sq cm. The uniformity of thick-ness of the epitaxial layers are typically better than ±5 pct across a given wafer. Electrical and optical measurerments indicute comparable uniformity in electrical and luminescent properties within a wufer. The application of this system to the large scale pro-duction of GaAs1-x Px for display devices, both discrete and arrays, is discussed. Typical electrical and luminescent properties of light emitting diodes fabricated front material produced by this technique are presented. THE most promising materials currently being utilized for visible injection electroluminescence are GaAs1-xPx, Ga1-xAlxAs, and Gap. All have reasonably efficient emissions in the red portion of the visible spectrum at room temperature; Gap also has an efficient green emission.&apos; At present, GaAs1-xPx has a technological advantage over Ga1-xAlxAs and Gap for display applications, since relatively large (several sq cm) areas of GaAs1-xPx suitable for use in electroluminescent devices may be readily grown by vapor phase growth techniques. In contrast, the preparation of Gap and Ga1-xAlxAs for electroluminescent device applications generally employs solution growth techniques which are at present not well suited for the growth of large areas of uniform thickness and doping level. The capability of uniform growth over large substrate areas and the use of multiple substrates is necessary for the practical utilization of electroluminescent devices. This is particularly important when quantity production or monolithic devices are required. Furthermore, in many display applications arrays of light emitting devices are used, the individual elements of which are of a size resolvable by the unaided eye. Thus the overall dimensions of display are substantially larger than those of most semiconductor devices. It is also necessary to achieve a high degree of control over the growth parameters to attain the required degree of reproducibility of materials properties for electroluminescent devices. In the case of GaAs1-xPx it is necessary to accurately and precisely control the phosphorus content of the alloy, both on a macroscopic and microscopic scale, in addition to the parameters generally associated with epitaxial growth such as thickness and doping level. This value is critical, as it has a major effect on the performance of electroluminescent devices. This paper describes the epitaxial growth of GaAsl-xPx suitable for electroluminescent display devices using a system developed specifically for this purpose, and which contains several novel features. The results of studies of selected physical properties of the epitaxial layers are also discussed. Finally, a brief summary is given of the characteristics of display devices fabricated from GaAsl-xPx grown in this system. EXPERIMENTAL A) Reactants. A number of techniques suitable for the vapor phase epitaxial growth of GaAs1-xPx have been reported in the literature.&apos;-&apos; The method selected for this investigation is that in which the Ga is transported by the GaC1-GaCI3 reaction in an open tube process. The results reported here were obtained using either the combination of GaAs, AsC13, and pH3, or Ga, AsH3, pH3, and HC1 as the initial re-actants.* The ASH3 and pH3 were obtained as dilute *Several different sources of supply were used for these reactants, y~elding comparable results._____________________________________________________ mixtures in HZ; the HC1 was obtained from the reduction of AsC13 by Hz at elevated temperatures. Both selenium and tellurium were employed as donor impurities, and zinc as an acceptor impurity. Selenium was introduced in the form of H2Se, tellurium in the form of tellurium-doped GaAs, and zinc in the form of diethy1 zinc. B) Apparatus. The prinicipal difference between the apparatus used in the present study and that of Tietjen and Amick,8 in addition to size and other related design features, is that RE induction heating is utilized in place of resistance heated furnaces. Induction heating was selected for this application because it appears to have several advantages, including: 1) It is possible to keep all fused silica portions of the apparatus at temperatures well below those of the reaction zone, thus minimizing a possible source of contamination. 2) The thermal mass of an induction heated system can be made small, thus reducing the total time required for the growth process. 3) Sharp temperature profiles (desirable for high deposition efficiency) are easily achieved. 4) The volume of the system for a given substrate area can generally be made smaller than a comparable resistance heated unit. This results in shorter time

Jan 1, 1970

By Donald E. Meyer

High current-low voltage EB-gun evaporation in an oil-free ultra-high vacuum system was found to be necessary, though not sufficient, for stability (300°C, 106 v per on) of aluminium gate MOSFET&apos;s and MOS capacitors not stabilized by a phosphorous glaze. five characteristics of the equipment used: 1) Vacuum purification of the aluminum charge, 2) Ionization of the evaporant by the electron beam, 3) X-ray formation, 4) Residual gases during evaporation, and 5) Metal film structure were studied as Possibly significant in MOS fabrication. EVAPORATION of contact metals common to the semiconductor industry historically has been accomplished with oil diffusion pump systems and various resistance heated evaporant sources as dictated by the type of metal evaporated. To meet a need for greater reliability of semiconductor devices, other metallization methods were developed. A good example would be application of the moly-gold contact system to integrated circuits with deposition by RF or triode sputtering.&apos; More recently, fabrication of stable metal-oxide-silicon devices and circuits has put new demands on metallization. The purity of the thin metal films composing MOS structures is critical, particularly at the metal-oxide interface, and ultra-high vacuum metallization using sputter-ion pumping and electron beam gun (EB-gun) evaporation are well suited for the task. At this laboratory aluminum has been the most common contact-gate metal for both MOS capacitors and MOSFET&apos;s. In the earliest work with MOS capacitors, aluminum was evaporated from wetted tungsten filaments using both diffusion pump and ion pump vacuum systems. In spite of clean oxide techniques these capacitors were unstable under bias-tempera-ture stressing. Only after a switch to EB evaporation of aluminum were stable capacitors produced. Using the same techniques it was possible to make MOSFET&apos;s with equivalent stability. Stability data for a discrete MOSFET is shown in Fig. 1. This is a "clean" oxide gate (no phosphorus stabilization or no etch back of a thicker gate) having a thickness of lOOO? thermally grown on the (111) plane. Gate length after diffusion was 0.24 mils, and the devices were hermetically sealed. Stressing conditions were 300°C and 106 v per cm applied alternately as a positive and negative field for 10 min, 50 min, and 4 hr for a total stress time of 10 hr. An initial shift in turn-on voltage of 0.1 v was detected for 10 min of positive bias. All evidence at this laboratory indicated that while EB-gun evaporation of ultra-high purity aluminum was not sufficient for 300°C stability, it did seem to be necessary. There may well then be something inherent in the EB-gun deposition used which enhanced stability, and probably no single factor existed but rather a series of factors. It is the purpose of this paper to report on some of the investigations carried out to learn more about EB-gun evaporation in ultra-high vacuum systems. EXPERIMENTAL DESCRIPTION The EB-gun was self accelerated, had a maximum power rating of 10 kw, and used a water-cooled copper crucible able to hold a 20-g aluminum charge. The electron beam was bent 180 deg and focused by an electromagnet which also provided movement of the beam across the crucible. Normal power conditions in this work were 9 kv and 300 to 600 mamp. The gun can be described as high-cur rent/low-voltage and was quite different in its mechanism of operation from EB-guns with much higher acceleration potentials. An oil-free vacuum system capable of 5 x 10- l0torr, a quartz crystal rate and thickness monitor and a quadruple mass spectrometer completed the evaporation system, Fig. 2. A typical evaporation cycle consisted of a 3 to 4 hr pumpdown to the upper l0-9 range and evaporation at l0? per sec with the pressure in the bell jar not rising above 1 x 10"7 torr. Thickness control was 5 pct or less and could be automatically monitored and controlled. Five phenomena associated with the EB evaporation and considered as possible contributors to Ma performance included a purification effect, ionization of evaporating aluminum, X-rays, constitution of vacuum ambient during evaporation, and film structure dependence upon evaporation rate. These phenomena are now discussed. Vacuum Purification. The design of the EB-gun permitted purification of the aluminum charge by vacuum outgassing. Particular features included an efficiently water-cooled copper hearth with a capacity of over 20 g of aluminum and the capability for sweeping the beam across the charge. Such capacity meant that aluminum had to be added only after about every fifth evaporation. A new charge was not required each evaporation as is necessary with filament evaporation. An oxide "scum" which appeared on the charge could be completely cleared from the top hemisphere of the charge by sweeping with the beam prior to opening the shutter. An indication of the purifying effect was obtained by a series of analytical measurements on incoming aluminum, after melting but with little vacuum out-gassing, after 30 min outgassing, and the evaporated film itself. Either a solids (spark source) mass spectrometer or an emission spectrometer were used for analyzing the aluminum charge. Analysis of the evapo-

Jan 1, 1970

By Don L. Kendall, Martin G. Buehler

A simple physical model has been developed to fit carrier-removal data in silicon irradiated near room temperature with reactor spectrum neutrons. Commonly observed donor and acceptor defect energy levels are assumed to be introduced linearly with neutron fluence. The donor levels (in ev) are Ev + 0.16, Ev + 0.27, and Ev + 0.31 and the acceptor levels are Ec - 0.55, Ec - 0.40, and Ec - 0.1 7, where Ev and Ec are the valence and conduction band energies, respectively. The introduction rates of each level are adjusted to fit literature initial carrier-removal rate data. When normalized with respect to the Ev +0.27 level, the relative values of introduction rates are 5.3, 1.0, 3.1, 1.0, 2.0, and 20.0, respectively for the six levels indicated above. To fit p-f (hole concentration vs neutron fluence) and n-f (electron concentration us neutron fluence) data, the introduction rates are multiplied by a factor which preserves the relative values given above. This factor depends upon irradiation temperature, reactor energy spectrum, neutron fluence calibration, and oxygen content of silicon. An extensive study of the effect of neutrons on carrier-removal in silicon irradiated with reactor spectrum neutrons (E > 10 kev) has been given by Stein and Gereth1 (SG) and Curtis, Bass, and Germano&apos; (CBG). They measured initial carrier-removal rates for both p- and n-type silicon over an impurity range typical of silicon devices. In this work, we attempt to fit a simple theory to this data to establish a usable relationship between hole and electron concentration, p and n, respectively, and neutron fluence f. The p-f and n-f relations are needed to assist in the design of neutron tolerant silicon devices and are needed to clarify presently used empirical resistivity-fluence relationships.3 Neutron damage in silicon produces a variety of defects ranging from simple point defects to defect clusters. For the purpose of this treatment, we assume that simple point defects dominate carrier-removal effects. In contrast to this view, stein4 has proposed that defect clusters are responsible for a significant portion of carrier-removal effects. In the following section, it is shown that the carrier-removal effect in n-type silicon with an electron concentration less than 1015 cm-3 can be explained adequately by assuming that the divacancy is the dominant defect and that its introduction rate is independent of the electron concentration. For electron concentrations greater than 1015 cm-= an additional acceptor defect center is needed, and for simplicity the A-center (vacancy-oxygen pair) has been chosen. Although the E-center (vacancy-phosphorus pair) can account for some of the results, the A-center was chosen because the E-center requires a more involved treatment which the presently available data do not justify. In p-type silicon three radiation-induced donor levels are assumed, namely the divacancy and two other centers of unspecified nature located at Ev + 0.16 ev and Ev to 0.31 ev. The donor divacancy at Ev + 0.27 ev is assumed to be introduced at the same rate in p-type as in n-type. However, this rate is too low to fit p-type initial carrier-removal data. The dominant centers in p-type silicon are assumed to be the Ev + 0.16 ev and Ev + 0.31 ev levels where the latter is not the divacancy. The introduction rates are chosen to fit initial carrier-removal rate data. Assuming that the introduction rates are independent of Fermi level, the ratio between them is fixed for subsequent p-f and n-f calculations. Using the same ratios, the initial carrier-removal rate data1,2 as well as p-f and n-f data1,5 can be fit provided the absolute value of the introduction rates are adjusted to account for irradiation temperature, reactor energy spectrum, neutron fluence calculation, and the oxygen content of silicon. THEORETICAL ANALYSIS This analysis is basically the same as that used by Hi116 to analyze electron damage in silicon except we express the degree to which an impurity level is ionized not in terms of the Fermi level, but in terms of carrier concentration. Landis and pearson7 have used the latter approach to analyze y-damage in silicon. Neutron-induced defects responsible for carrier-removal at room temperature are assumed to be simple point defects with no interaction between defects so that they may be represented by discrete energy levels. It is also assumed that no constituent of a defect complex is used up and defects stabilize shortly after irradiation. Defects are assumed to be introduced linearly with fluence according to the product Rtf where Rt is the defect introduction rate and f the neutron fluence. Taking into account the ionization of defects according to Fermi statistics, and considering charge neutrality where minority carriers are neglected, the n-f relation is where no is the preirradiation electron concentration. The parameter Nt is the electron concentration at which the ionized defect concentration is one-half the total defect concentration (Rtf) or where Et is the defect energy level. For silicon at 300°K, ni = 1.45 X 1010 cm-3 and Ei = Ev+ 0.542 ev which was determined using Ec — Ev = 1.11 ev and me* = 1.07 mo and mh* = 0.558m0. The spin degeneracy factor, which usually appears as a number multiplying the Nt/n term of Eq. [1], is taken as unity. In effect, this factor has been incorporated into the defect en-

Jan 1, 1970

By S. Sumski, M. B. Panish, R. T. Lynch

The liquidus isotherms in the gallium-rich corner of the Ga-Al-P phase diagram have been determined from 1000" to 1200°C and at I100°C the corresponding solidus isotherm was obtained. A simple thermody-namic treatment which permits calculation of the solidus and liquidus isotherms is discussed. A technique which was previously used for the growth of GaxAl1-xAs was used for the preparation of solution epitaxial layers of GaxAl1-xP and ALP. An approximate value of 2.49 i 0.05 ev for the band gap of Alp at 300°K was obtained and the ternary phase data were used to estimate a value of 36 kcal per mole for the heat of formation 0f Alp at that temperature. The Gap-A1P crystalline solid solution is one in which there exists the possibility of obtaining crystals with selected energy gaps, within the limits imposed by the energy gaps of Gap and Alp. Such crystals are of considerable interest because of their potential value for optoelectronic and other solid-state devices. Furthermore, it has been amply demonstrated for GaAs and GaP,&apos;-7 that device, or bulk materials grown from gallium solution generally have more efficient radiative recombination than materials prepared in other ways. This presumably due to the lower gallium vacancy concentration in such material.= Small crystals of GaXAl1-xP and A1P have been grown from solution,8-10 and A1P has been grown from the vapor," but neither have previously been grown by liquid epitaxy. In this paper we present the ternary liquidus-solidus phase diagram of the Ga-A1-P system in the region of primary interest for solution epitaxy, and discuss the thermodynamic implications of that phase diagram with particular reference to the liquidus and solidus isotherms in the gallium-rich corner of the GaxAl1-xP primary phase field and to the A1-P system. Several measurements of the absorption edge of GaxAl1-xP crystals have been made and the width of the forbidden gap of A1P has been estimated from these measurements. EXPERIMENTAL The differential thermal analysis technique used to determine the liquidus isotherms and the optical measurements used in this work are similar to those described previously12 for the Ga-Al-As system, ex- thermocouples in the thermopile for added sensitivity. The materials used were semiconductor grade Ga, Gap, and Al+ The composition and temperature range at which DTA studies could be done was quite restricted. The upper temperature was limited by the chrome l-alumel thermopile to about 1200°C, and the highest aluminum concentration to about 5 at. pct by low sensitivity caused by the reduced solubility of Gap with increasing aluminum concentration in the liquid. DTA studies were not possible at 1000°C and below because of the low sensitivity caused by low solubility of Gap in the Ga-A1-P system. The cooling rate for these studies was about 1°C per min. No heating studies were done because of limited sensitivity. Supercooling probably does occur, but our experience with other 111-V systems indicates that it is no greater than about 10 to 15.c. Solid solubilities were determined by analyzing epitaxial layers of GaxAl1-xP grown from the liquid, with an electron beam microprobe. The layers were grown on Gap seeds by a tipping technique in which the layer is grown over a short-temperature range (20" to 50°C) on the seed from a solution of known composition. The tipping technique reported by Nelsson1 for GaAs could not be used, particularly for solutions containing appreciable amounts of aluminum, because of the formation of an A1203 scum on the liquid surface. A system was therefore designed, which would effectively remove the oxides mechanically, so that uniform wetting and crystal growth could occur. This tipping technique has already been described in detail." The best control over the composition of the re-grown layer was obtained when the tipping was done at a temperature which corresponded to the temperature of first formation of solid for the solution being used. Generally, therefore, a solution was prepared by adding the amounts of Ga, Gap, and A1 required to yield a solution which would be completely liquid above the tipping temperature with solid precipitating below that temperature. For most of the work reported here, the 1100°C isotherm of the ternary was used. It was generally necessary to heat the solution to 50" to l00. C above the tipping temperature to dissolve all of the Gap in a reasonable length of time. The epitaxially grown layers were used both for optical transmission measurements to aid in the estimation of the way in which the absorption edge changed with aluminum concentration, and for the electron beam microprobe analyses to provide data for the determination of the solid solubility isotherm. RESULTS AND DISCUSSION Liquidus Isotherms in the Ga-A1-P Ternary Phase Diagram: Thermodynamic properties of the system. The only thermal effect studied in this work was that

Jan 1, 1970

By R. P. Dolan, W. M. Shedd, B. L. Buchanan

Analytical expressions are derived from empirical data relating the basic physical device parameters to the radiation dose. To put in perspective and justify the approach taken, the overall problem and methods of attempted solution of radiation damage to transistors in a missile or satellite environment is briefly examined. The main emphasis is on a new criteria for neutron radiation hardness and the device design implications resulting from using this criteria. Contrary to other derived criteria, the derived bipolar hardness relation depends mainly on the initial lifetime rather than the base transit time. It is shown, that contrary to previously accepted beliefs, the inherent attainable radiation tolerance of JFET&apos;s is at least a factor of ten greater than the radiation tolerance ofbipolars. Experimental results on JFET&apos;s designed for maximum neutron radiation tolerance are presented. The accuracy, utility, and range of possible validity of various published lifetime and carrier removal damage constants are discussed. It is well known that transistors are subject to damage due to radiation at much lower radiation levels than those which would cause structural damage to a missile or satellite. The three principal categories of radiation damage to transistors are displacement, ionization, and thermomechanical. The main cause of displacement damage is fast neutrons, and the main effects which permanently degrade transistor operation are minority carrier lifetime reduction and carrier removal. A second-order effect is mobility reduction. The main cause of ionization damage is gamma radiation which results in permanent effects due to charge build-up in the oxide and transient effects due to photo-current generation. The transient effects are usually handled by using circumvention techniques in the electronics system. The extent of the transistor degradation due to displacement and ionization damage depends strongly on the transistor type, whereas the extent of thermomechanical damage does not depend on the transistor type, but depends mainly on packaging and metallization which are common to all transistor types. The standard transistor types are categorized in Fig. 1 and typical cross-sections are shown in Fig. 2. The original reason for the designation of the two classes of transistors was that the unipolar operation depends on only one carrier (majority) and the bipolar operation depends on both minority and majority car- riers. The bipolar is then seriously degraded by minority carrier lifetime reduction, whereas the unipolar or field effect transistor is not. One of the two principle classes of field effect transistors, the junction field effect transistor (JFET), depends strongly on carrier removal. However, the insulated gate (MIS) is little affected by either carrier removal or lifetime changes, but is virtually eliminated as a radiation resistant device because of permanent charge build-up in the insulator caused by ionizing radiation. The bipolar and JFET suffer only minor effects due to charge build-up in the oxide passivation when compared1 to the MOS. This is because the active region of the MOS is adjacent to or part of the oxide layer. It is then the bipolar and JFET which are potentially resistant to permanent radiation damage. DERIVATION OF RADIATION TOLERANCE RELATIONS Criteria. The bipolar is by far the most widely used transistor type. The usual criteria for hardening bipo-

Jan 1, 1970

By Edward F. Winter, C. E. Ruoff

A silicon solid-state array image scanner is described. This paper deals with structural and performance properties of the array which basically consists of PIN photo and gating diodes, and low capacitance isolation diodes. Each chip of the array is composed of an 8 by 9 matrix of photo detector cells; each cell contains one each of the three diode types mentioned. This x-y matrix is read a column at a time with an access delay of approximately 100 nsec per column. It is designed to detect the presence or absence of illumination within 10-mil diam image spots located on a 15- by 15-mil grid. Radiant power level of an illuminated spot is low; of interest is the range around I uw with a of 8400g Structural improvements to the original array which will result THE purpose of this paper is to describe the results of a solid state scanner exploratory development activity. The scanner is intended to sense the presence or absence of low-level illumination falling upon a matrix of 10-mil wide squares arranged on a 15- by 15-mil x-y grid pattern. The light of interest has a wavelength of 8400, characteristic of radiation emitted from a GaAs lasing diode. This wavelength matches well the spectral absorption of silicon,&apos; thus the well-developed silicon processing technology can be applied to fabricating large integrated arrays of PIN photocells to sense the radiation. The illumination state of the cells of the array is read, one column at a time, by addressing a drive line of the particular column in question and examining the state of those sense lines which are orthogonal to the drive Lines of in greater sensitivity at various wavelengths, both above and below 8400Å, and in greater speed are presented. These include variations in diffusion depth, resistivity of N and P regions, isolation techniques, and packaging. Trade-offs between access speed, cycle frequency, and sensitivity are discussed. A packaging approach to achieving an array composed of several chips is described. Requirements on this package are: 1) maintenance of 15- by 15-mil pitch of the light sensitive cell position, therefore positional accuracy of mounted 8 by 9 cell photo detector chips; 2) maintenance of inherent high array speed even though signal levels are low through high density close proximity mounting of monolithic sense amplifier circuitry. the array. One bank of N sense amplifiers is required, where N is the number of photodiode cells in each column of the array. CELL AND CHI" STRUCTURE A photograph of a single monolithic cell is shown in Fig. 1. Each cell is composed of three junctions, an isolation junction, a logic or blocking diode junction, and a photodiode junction; all of these junctions are connected electrically by a common N region. An electrical schematic of four cells of the array is shown in Fig. 2 with the associated driver and sense amplifier circuits in block diagram form. Note the common cathode configuration of the three diodes of each cell. Fig. 3, a diagram of the cell vertical struc ture, illustrates how the electrical configuration of

Jan 1, 1970

By M. R. Lorenz

Efficient visible light emission from p-n junctions in semiconductors is currently achieved in the four materials, Sic, GaP, ]Ga1-xAs and GaAs1-x,. Recent advances in materials preparation and p-n junction formation are briefly reviewed. The radiative recombination processes in the different materials depend largely on the band structure and the impurity states of each material. The spectral distribution of the emission ranges from the blue in Sic, to green in Gap, yellow in Sic and red in Gap, Ga1-x AlxAs and GaAs1-x Px. The origin of the various processes are discussed. The conversion of the electrical power into optical power and the measurement of the conversion efficiency are reviewed. The currently maximum quantum efficiencies at 300°K are: 3 pct in GaP(red), 1 pct in SiC(yellow), 0.1 pct in GaP(green), 0.2 pct in Ga1-x AlxAs at 66001, and 0.1 pct in GaAs1-x Px at 6800. The brightness and the interplay of the quantum efficiency and the luminous efficiency are given detailed consideration. VISIBLE light generated by the application of a direct current to a semiconductor crystal was first observed by Lossev1 in 1923. Light emission came from naturally occurring junctions in Sic crystals but little was known then with regard to the mechanism of charge transport and light emission. Some nearly 30 years later and with a vastly increased understanding of semiconductors the phenomenon of electroluminescence was studied in more detail, for example in p-n junctions of germanium.2 In these early studies, the efficiency of converting the electron current into a photon current was very low and therefore aroused little interest toward practical application. More recently it became apparent that in certain materials, for instance GaAs, and under certain conditions, the conversion efficiency was not low at all.3 The subsequent discovery of the p-n junction laser4-6 provided the impetus for increased studies of electroluminescence. Light emitted from GaAs occurs in the infrared region of the electromagnetic spectrum and is not visible to the eye. At nearly the same time the use of GaAs1-xPx led to laser action at low temperatures which was visible to the eye.7 Later a red light emitting diode, made from Gap, was reportedS which emitted incoherent radiation at 300°K with an external quantum efficiency of about 1.5 pct. The fact that such efficient devices were obtainable led to a more concentrated effort in the search for highly efficient room-temperature semiconductor light sources. It is some of this later work on p-n junction luminescence with which we will be concerned here. Since our aim is centered on visible light, with hv =1.8 ev ( ?=7000?), only the wider band gap semiconductors are of interest, i.e., Eg 1 1.8 ev. Although many compounds meet this criterion, only a limited number of those are also good semiconductors, i.e. contain low resistance n and p regions. Some of the more promising candidates are listed in Table I. We will only be concerned with light generation from a p-n junction. This limitation excludes essentially the group II-VI binary compounds, although we will briefly review the case of ZnTe and the solid solution ZnTe1-xSex. As we will show they may contain a p-n junction but only of a special kind. Most of the discussion will deal with the four materials, Sic, Gap, Gal-xAlxAs, and GaAs1-xPx. These appear to be at the present time the best visible light emitting semiconductors. In the following sections we will briefly consider: 1) the electrical properties of p-n junctions; 2) some recent advances in materials preparation; 3) the formation of p-n junctions; and then in somewhat greater detail we will consider: 4) the various radiative recombination processes; 5) the measurement and observation of the external quantum efficiency; 6) the luminous efficiency; 7) the brightness of light emitting diodes (LED&apos;S). THE P-N JUNCTION The p-n junction in a semiconductor crystal is the interface between two differently doped regions. More specifically the p region is doped predominantly with acceptor impurities and the n region contains predominantly donor impurities. The energy band structure of a degenerate p-n junction at thermal equilibrium is shown in Fig. l(a). The excess electrons on the n side of the junction are confined to this region by the barrier potential Eg. Similarly the excess holes on the p-side of the junction are confined to the p-region by a similar potential barrier. If we now apply a dc voltage V such that the p region is made positive and the n region negative, the barrier potential EB is reduced by the applied voltage, V and the junction is said to be forward biased. With the barrier potential lowered, electrons and holes can drift toward the p region and n region, respectively, see Fig. l(b). The current voltage characteristics of p-n junctions in most wide band gap materials can be described by the relation: J = Joexp(eV/BkT) [1] where the functional form of Jo is determined by the recombination mechanism. Jo is generally a complicated parameter which depends on a number of different factors including temperature, junction width, bias voltage, and carrier lifetimes. The parameter B also depends on the recombination mechanism but

Jan 1, 1970

By J. J. Tietien, R. O. Clough

A technique previously used to prepare alloys of InAs1-xPx and GaAsl-x Px, miry: the gaseous hydrides arsine and phosphine, has been extended to grow single -crystalline GaAs 1-x Sb x by replacing the phos-phine with stibine. Procedures were developed for handling and storing stibine which now make this chemical useful for vapor phase growth. This represents the first time that this series of alloys has been grown from the vapor phase. Layers of P -type GaSb and GaSb-rich alloys have been grown with the carrier concentrations comparable to the lowest ever reported. In addition, a p-type alloy containing 4 pct GaSb exhibited a mobility of 400 sq cm per v-sec which is equivalent to the highest reported for GaAs. RECENTLY, interest has been shown in the preparation and properties of GaAs1-xSbx alloys, since it was predicted1 that for compositions in the range of 0.1 < x < 0.5, they might provide improved Gunn devices. However, preparation of these alloys presents fundamental difficulties. In the case of liquid phase growth, the large concentration difference between the liquidus and solidus in the phase diagram, at any given temperature, introduces constitutional supercooling problems. It is likely that, for this reason, virtually no description of the preparation of GaAs1-xSbx by this technique has been reported. In the case of vapor phase growth, problems are presented by the low vapor pressure of antimony, and the low melting point of GaSb and many of these alloys. In previous attempts1 at the vapor phase growth of these materials, using antimony pentachloride as the source of antimony vapor, alloy compositions were limited to those containing less than about 2 pct GaSb. This was in part due to the difficulty of avoiding condensation of antimony on introducing it to the growth zone. A growth technique has recently been described2 for the preparation of III-V compounds in which the hydrides of arsenic and phosphorous (AsH3 and pH3) are used as the source of the group V element. With this method, GaAs1-xPx and InAs1-xPx have been prepared2&apos;3 across both alloy series with very good electrical properties. Since the use of stibine (SbH3) affords the potential for effective introduction of antimony to the growth apparatus, in analogy with the other group V hydrides, this growth method has been explored for the preparation of GaAs1-xSbx alloys. In addition to GaSb, these alloys have now been prepared with values of x as high as 0.8. In the case of GaSb, undoped p-type layers were grown with carrier concentrations equivalent to the lowest reported in the literature. Thus it has been demonstrated that, with this growth technique, all of the alloys in this series can be prepared. EXPERIMENTAL PROCEDURE A) Growth Technique. The growth apparatus, shown schematically in Fig. 1, and procedure are virtually identical to that described2 for the growth of GaAs1-xPx alloys, with the exception that phosphine is replaced by stibine.* HCl is introduced over the gallium boat to *Purchased from Matheson Co., E. Rutherford,N+J. transport the gallium predominantly via its subchlo-ride to the reaction zone, where it reacts with arsenic and antimony on the substrate surface to form an alloy layer. The fundamental limiting factors to the growth of GaAs1-xSbx alloys from the vapor phase, especially GaSb-rich alloys, are the low melting point of GaSb (712°C) and the low vapor pressure of antimony at this temperature (<l mm). Thus, relatively low antimony pressures must be employed, which, however, imply low growth rates. To provide low antimony pressures, very dilute concentrations of arsine and stibine in a hydrogen carrier gas were used. Typical flow rates (referred to stp) were about 4 cm3 per min of HC1 (0.06 mole pct)+ from 0.1 to 1 cm3 per min of ASH, (0.002 to 0.02 mole pct), and from 1 to 10 cn13 per min of SbH3 (0.02 to 0.2 mole pct), with a total hydrogen carrier gas flow rate of about 6000 cm3 per min. Although no precise data on decomposition. kinetics exist, it is known4 that stibine decomposes extremely rapidly at elevated temperatures. However, the high linear velocities attendent with the high total flow rate (about 2000 cm per sec) delays cracking of the stibine until it reaches the reaction zone and prevents condensation of antimony in the system. To improve the growth rates of the GaSb-rich alloys, growth temperatures just below the alloy solidus are main-

Jan 1, 1970