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By T. G. R. Rawlins, L. E. Brosselard

Direct platinum carbon replicas have been used to study substrates prior to growth and after initial nu-cleation of the layer. Replicas have been directly stripped and correlations have been made with other replica techniques. Mechanically polished substrates are very flat with occasional areas of "dirt", which is apparently silicon. When such substrates are etched in hydrochloric acid gas, scratches and hexagonal defects (thought to be polishing compound) are revealed, together with areas of apparent redeposition. Chemically polished substrates are much less flat although much more homogeneous in appearance. Heat treat)nents have no effect. Nuclei deposited on these surfaces, using a normal silicon tetrachloride system, have been examined. Nuclei on mechanically polished subsrates occur in random areas only, whereas on chemically polished surfaces they are more uniformly distributed. THE interest in the study of thin films and now their rapidly expanding use in many fields has increased over a period of years. Much of this current interest, particularly in the field of single-crystal or epitaxial thin films, has derived its stimulus not only from possibilities for application but also from fundamental electron-microscope studies which have indicated the manner of growth of such layers from the initial nuclei.1-5 Previous work involving study of growth processes may be divided into three categories. First, vacuum deposition, primarily of metals, on a variety of substrates has been studied by electron microscopy and electron-diffraction techniques. These have shown the three-dimensional aspect of nucleation and the remarkable liquidlike behavior of the growing nuclei which coalesce to form a complete layer. More recently this work has been expanded in two ways: by growth inside the electron microscope this has obvious advantages for kinetic studies; and by growth in ultrahigh vacuum—much of this work has been done on semiconductors.8-11 It is of interest to note that metals, specifically gold deposited on rock salt, will form only polycrystalline layers in ultrahigh vacuum unless the substrate surface is contaminated.12 In general the mode of growth for vacuum-deposited semiconductor films is the same as that for metal films. The second method of growth that has been studied is that of electrodeposition.13,14 The little that has been published suggests that the mode of growth is similar to the vacuum case, except that irregularities may perturb the electric field and disturb the growth process. The third and last primary method of growing epitaxial layers is by use of chemical methods. These techniques have generated much interest and much has been published on them. Considerable electron-microscope work has been done on the defects in the layers; however comparatively little work has been undertaken on the initial nucleation and early stages of growth. Confining ourselves now exclusively to the case of silicon, Charig et a1.15 have considered the growth of silicon on silicon substrates by hydrogen reduction of trichlorosilane, and studied the films by means of replica and transmission techniques. Subsequently they have studied the same system for growth on quartz,16 and with the addition of pyrolysis of silane on quartz and alumina.17 Also Manasevit el al. have studied deposits using silane and silicon tetrachloride on sapphire.18-14 Finally, in this volume studies of deposition on beryllia and sapphire are reported. Although Revesz and Evans20 have examined complete layers, grown by means of the widely used silicon tetrachloride reaction, no detailed examination similar to that published by Charig and Joyce21 for the trichlorosilane system has been given. Therefore this investigation has examined substrate surfaces prior to growth and then nucleation on these surfaces for the silicon tetrachloride system. EXPERIMENTAL In this work the surfaces have been studied by means of standard replica techniques. Because of the very real problems associated with artifacts introduced,22 different replicas and different cleaning

Jan 1, 1967

By J. P. Pritchard, J. T. Pierce, O. G. Slay

This paper discusses the results of a technology-evaluation program to ascertain the feasibility of a piotornask-photoresist technology developed for fabrication of multiple-layer thin-film superconductive circuitry. The uehicle selected for this evaluation was a 120-bil associative data processor requiring a set of nine photomasks to define a similar number of patterned material layers of lead, tin, and polymer insulation. A total circuit area of 4 sq in. involved 2500 actitle and 12,000 passive crossings. Several short-free, electrically continuous specimens were satisfactorily completed under this program. Problems encountered in the preparation and use of the requi-ed set of Photomasks are discussed, as also are the problets of providing suitable external connections. A major retarding factor in the development of the superconducting thin-film cryotron technology for many years was the absence of batch fabrication means yielding necessary device density and count per substrate for practical applications. Early workers in the field desired only limited numbers of devices to permit careful study of discrete devices and representative circuitry integrating logic and memory capabilities. For these purposes mask stencils could be formed to selectively control the placement of materials, sequentially vapor-deposited in vacuum, to form the multilayer structure. In general a distinct pattern was required for each material layer; therefore, mechanical provisions were required to change not only the material source, but the patterning mask as well, before each deposition. All deposition steps were preferably performed in a single evacuation of the deposition chamber. Thus the means for storing, transporting, and registering masks and sources with respect to the substrate existed and were operated within the vacuum environment. In the authors' experience, the approach was and remains serviceable for preliminary device study, but was not extensible to an economical manufacturing method by virtue of the difficulties inherent in mask stencil preparation and use, and the capital investment implicit in the mechanization requirements. Since the commercial attraction of the cryotron technology stems principally from its potential for economical batch fabrication, the authors' program has placed major emphasis on fabrication methods. A highly useful method has evolved through adaptation

Jan 1, 1967

By William F. List, Marvin A. Schuster

Monolithic electrooptical mosaics of 2500 photo-transistor elements with internal row and surface column interconnections have been fabricated by epitaxial-planar diffsion techniques. Unique access to any elemed of the mosaic is provided through one of the fifty X and one of the fifty Y external leads. The sensor mosaic can be used for imaging applications and has a 1:1 aspect ratio, a resolution of 100 lines per in., a dynamic range in excess of lo3, a sensitivity of 0.5 per pw, element response within a 2:l range over 75 pct of the mosaic, and a minimum detectable signal of the order of 10-' w. Design considerations which ilnpose particclar fabrication yequirements are disctussed along with some of the problems peculiar to the epitaxial and planar-dijfision techniqes by which this device is fabricated. The solid-state silicon monolith has an imaging area of 0.5 by 0.5 in. and an element center -to- center spacing of 0.010 in. J monolithic solid-state electrooptical device has been developed as the photon-sensing mosaic for use in an image-converter system.' This system is the solid-state equivalent of the vidicon and can image radiation in the visible and near-infrared regions of the spectrum. The electrooptical image converter has the desirable size, weight, reliability, and low-power characteristics inherent in solid-state devices. It is read out by direct-wire means rather than by beam-scan techniques. The packaged unit is shown in Fig. 1. A selection of material for the sensor was based on considerations of both reliable fabrication techniques and material spectral response. Silicon was selected both for its response from the lower end of :he visible to the long-wavelength cut-off above 11,000A and for its well-developed epitaxial planar-diffused technology. The electrical image is composed of M x N discrete information bits with each bit emanating from one of the individual phototransistor sensors. The interconnected mosaic concept was introduced to provide a structure which is both manageable in its number of leads and compatible with conventional viewing systems which accept XY data. Interconnections along the Y direction are provided by internally diffused strips, while interconnections along the X direction are formed by vacuum-deposited metal surface bars. Unique access to any individual element of the M x N mosaic is available through one of the M and one of the N external leads. PHOTOTRANSISTOR DESIGN A phototransistor structure2 was selected for the discrete photon detectors of which the mosaic is com- posed. Basically, the mode of phototransistor operation is such that incident quanta are absorbed in the base area of the element where they generate electron-hole pairs. If the electrons are liberated within a diffusion length of the depletion region around the collector junction, they will diffuse to this depletion region and be swept across the junction where they account for a small component of the photocurrent. Similarly, the holes which are created within a diffusion length of the emitter junction will diffuse to this region where they forward bias the emitter and so induce injection of minority carriers into the base. This accounts for the substantial transistor photocurrent. This mechanism of operation implies several design and fabrication goals for the individual sensor elements: high electrooptical conversion efficiency, sufficient carrier lifetime in the base regions, and a maximum volume in which photons can be absorbed within a diffusion length from the depletion layer about the junction. Moderately high transistor gain is desirable to permit readout at low light levels; however, very high gain has a deleterious effect on mosaic dynamic range. The mosaic must also be characterized by good uniformity of element response as well as by good isolation between elements. The above set of conditions imply that junction depths must be optimized with respect to photon ab-

Jan 1, 1967

By Robert L. Gower, John H. Cash

Interconnections for integrated circuits operating at rnicrowaue frequencies rzust be formed as microwave transmission lines. This paper describes the fabrication of one type of microwave transmission line known as microstrip, which can be fabricated on momlithic integvated circuits by deposition of 0.1- to 2.0-mil-thick metal and dielectric films. A microstrip line consists of a narrow conducting strip separated from a gvound plane by a dielectric material. Thick films of good conducting materials are required for low loss at high frequencies. Vacuum-evaporation methods for depositing aluminum and silver films are described. The narrow conducting strip forming the top conductor is defined by photoresist-etching techniques after the thick rnetal film is deposited. Gold plating with a photoresist-masking technique is also used to forrrz thick metal conductors. The microstrip dielectric layer is formed by deposition of suitable dielectric films 0.1 to 2.0 mils thick. Several deposition techniques were investigated. Electron-beam evaporation of quartz is described. Electrical characteristics of deposited microstrip lines at microwave frequencies are included and the microwave power attenuation as a function of conductor and dielectric thickness is given. It is concluded that the deposition of microstrip transmission lines is a practical way to achieve low-loss interconnections in monolithic integrated circuits. CONNECTIONS between devices in low-frequency and digital circuits are usually made by connecting the devices with a length of conductor such as a metal lead oi- a wire. If this method were applied to microwave integrated circuits, the reactance of the connection due to the series inductance and parasitic capacitance would be very high, in fact too high to permit successful circuit operation. In addition, resonance and antenna effects would occur at high frequencies, especially when the connections approach the wavelength.' Connections which are sections of transmis- sion line will overcome these difficulties. The electromagnetic field is confined to the volume of the transmission line, parasitic effects are not present, and circuit design utilizes familiar transmission-line techniques. TRANSMISSION LINES One type of transmission line geometrically adaptable to integrated circuits is known as micrstri. A microstrip line can be generated from a coaxial line as shown in Fig. l(a). The outer conductor of the coaxial line is distorted into an ellipse (b) and finally separated at the extremities of the ellipse to form the strip transmission line shown in (c). One of the ground planes is then removed, leaving a conducting ground plane and a narrow conducting strip separated by a dielectric. Two configurations of the microstrip line were considered in this investigation, Fig. 2. Type (a) is fabricated from a semiconductor slice with the ground plane and top conductor deposited on each side of the slice. The semiconductor slice serves as the die lec-

Jan 1, 1967

By C. D. Thurmond

Jan 1, 1968

By E. W. Mehal, R. W. Haisty, D. W. Show

The next generation of integrated circuits will probably include circuits constructed in and of GaAs. The existence of both semi-insulating and semiconducting forms of GaAs is the fact which will bring this about. In this paper we discuss the uses and limitations of semi-insulating GaAs for integrated-circuit applications. The two main areas considered are the electrical isolation that can be achieved between components on a semi-insulating substrate and the characteristics of p-n junctions in contact with semi-insulating GclAs. A process basic to attaining integrated circuits in GaAs to fully utilize the insulating properties of the substrate is selective epitaxial deposition. This process involves the deposition of a SiO2 layer onto a The trend in integrated circuits is towards the use of high-resistivity substrates or regions to achieve component isolation. The use of SiO, layers in the oxide isolation methods and the use of sapphire substrates are examples of this idea. GaAs is also a polished surface of a GaAs substrate, etching out selected area of the SiO, film to expose a GaAs surface, and deposition only onto the exposed GaAs surface. By using this process , islands of semiconducting GaAs are deposited onto a semi-insulating GnAs substrate, the islands being electrically isolated from one another by the substrate. The deposition of both p- and n-type semiconducting GaAs can be carried out in this nzanner to form p-n junctions in the island areas. This process can also be used to produce a planav structure by deposition of GctAs through a SiO, mask into holes etched into the GaAs substrate. This Putterned Epitaxial Technology (PET) is described. very promising material for use in future integrated circuits because of the existence of both semi-in-sulating and semiconducting forms. Active devices can be fabricated in the semiconducting material, and these individual components can then be electrically isolated from one another by using semi-insulating GaAs as the substrate. Epitaxial semi-insulating GaAs can also be produced thus making three-dimensional monolithic integrated circuits feasible.' This paper describes the research aimed at developing the methods for producing both two- and three-dimensional integrated circuits in GaAs, and examines some of the properties of semi-insulating GaAs as they relate to these integrated circuits.

Jan 1, 1967

By D. H. Forbes, I. B. Cadoff, H. M. Manasevit

Single-crystal silicon films have been obtained on several natural crystal faces of BeO using the thermal decomposition of silane and the hydrogen reduction of silicon tetrachloride. From an analysis of X-ray diffraction data it was determined that the following film-substrate orientation relationships exist: (111) Si 11(0001) BeO, (111) Si 11(1011) BeO, (100) Si 11f1010) BeO. and (110) Si 11(1010) BeO. An analysis of the crystallographic relationships between the film and substrate indicates that a match occurs between the silicon atoms in the film and the berylliuni ion sites in the substrate. This correspondence is in agreement with previous work on the deposition of silicon on sapphire.1-3 silicon on spinel: and tungsten on sapphire. The high resistivity, thermal conductivity, and radiation resistance of beryllium oxide make it an important substrate material for the deposition of thin films of silicon or other semiconductors. The importance of semiconductor-insulator composites to the field of integrated microelectronics has been well-documented in the case of silicon on sapphire.'-' The successful growth of large-area single-crystal silicon on an insulator, sapphire, was first reported in 1963.1,2 Since that time studies have been made of the crystallographic relationships between the deposited film and the sapphire substrate. On the basis of the observed relationships, a model has been proposed relative to the crystallographic requirements for epitaxy between the semiconductor film and the metal oxide substrate.3 It is proposed in this model that epitaxy is the result of a match between atoms of the deposited film and the metal ion sites of the substrate plane. This match is not limited to a 1 to 1 correspondence between sites in the two lattices. Sub- sequent studies of the deposition of silicon on spinel4 and tungsten on sapphire5 have yielded data which support this model. On the basis of this previous work it was felt that silicon on BeO should also fit this model. In the present study, the choice of substrate orientation was limited to the natural faces of synthetic BeO crystals. Of the faces available, the (0001) plane seemed the most favorable for epitaxial growth. EXPERIMENTAL PROCEDURE Silicon films were deposited from silane and silicon tetrachloride in the apparatus shown in Fig. 1. The hydrogen ambient gas was purified by passage either through a DEOXO unit, molecular sieves, and a liquid nitrogen cold trap, or through a heated Pd-Ag thimble. The gas was then mixed with the silicon source materiai and passed over the substrate which lies on a spacer above an inductively heated silicon pedestal. The following deposition conditions were used: a hydrogen flow rate of 3 liters per min with silane and silicon tetrachloride concentrations of 0.2 mole pct and a pedestal temperature of 1175" * 5°C as observed with an optical pyrometer assuming an emissivity of 1.0. Deposition was preceded by a 15- to 30-min hydrogen-etch period conducted at a temperature of 1275°C (obs). Adherent silicon films from 2 to 10 u were grown on the various BeO faces. The substrates were synthetically grown beryllium oxide single crystals ranging from 5 to 10 mm in

Jan 1, 1967

Jan 1, 1967

Jan 1, 1968

By P. K. Weimer

Coinpletely integrated thin-film circuits inco?,porating more than 1000 active and passive elements have been fabricated reproducibly in the laboratory by evaporation of- all components. A 180-stage modified shift register comprising 540 CdSe TFT's, 360 resistovs, and 180 capacitors was deposited upon a glass substrate during one pump-down of the vacuum systeitl. Experimental units have been operated for more than 5000 hr at temperatures uP to 85°C without failure of any slages. The present pupper reviews the charvactevistics of evaporated thin-film transistors (TFT's) and discusses their application to integrnted circuils. INTEGRATED circuits most widely used today are based upon silicon technology, with the circuits formed on the surface of a block of single-crystal silicon1 or on a block of sapphire 2,3 upon which a thin layer of silicon has been deposited. Transistor patterns and interconnections are defined by photographic procedures using photoresist masking. Large groups of transistors are produced in batches which undergo many processing steps, some of which are carried out at elevated temperatures. Passive elements are formed by treatment of the semiconductor surface or are deposited by evaporation alongside the active elements. The size and complexity of the circuits are limited by defects in the devices and by the size of the available single-crystal chips. Capacitative coupling to the semiconducting substrate may also limit useful size and frequency response of the circuits. An alternative approach to integrated circuits is based upon the deposition by evaporation of all circuit components upon a noncrystalline, insulating substrate such as glass.4 Thin-film field-effect transistors,1'6 known as TFT's, can be deposited in large arrays on glass or plastic substrates at the same time the associated passive elements are being deposited. Although still in the research stage the all-evaporated approach is expected to offer certain advantages for many applications. In particular, the use of thin films upon a noncrystalline substrate offers the prospect of producing complex, large-area circuits not now feasible with single-crystal silicon. Important applications of this type include memory arrays for computers and imaging devices for television. The ease with which the evaporated TFT's can be deposited may permit continuous, automated production methods not possible with high-temperature batch processing. Recent advances7'8 in the fabrication of thin-film transistors have led to greatly improved reproduci-bility and life of the TFT's. Experimental circuits having over 1000 active and passive elements deposited upon a common glass substrate are currently being produced in the laboratory. The present paper reviews recent progress in the development of the TFT and in its application to integrated circuits. I) DESCRIPTION OF THE THIN-FILM FIELD-EFFECT TRANSISTOR The TFT is a field-effect transistor of the type having the control gate separated from the semiconductor by a thin insulating spacer. Although its operation resembles that of the silicon MOS transistorg its construction is based entirely on thin-film techniques. Fig. 1 shows a cross-sectional view of an evaporated TFT deposited upon a glass substrate compared with a silicon MOS transistor deposited upon single-crystal sapphire.3 The semiconductor in the TFT is a poly crystal line layer, of a material which can be readily evaporated, such as cadmium sulfide, cadmium selenide,l0 or tellurium." Silicon monoxide layers have usually served as the gate insulator, but other oxides, sulfides, and fluorides may be used. Film thicknesses range from a few hundred to a few thousand angstroms. The source, drain, and gate electrodes in the TFT are of metal. Qpical source-drain gap dimensions are 0.0003 x 0.030 in., with a gate strip whose width slightly overlaps the source and drain. The source and drain electrodes should make low impedance contacts to the semiconductor. With cadmium sulfide films, gold is a satisfactory material for underlying electrodes, while aluminum is preferable for overlying electrodes.12 Considerable variation in design of the TFT is permissible, with the electrodes being

Jan 1, 1967

By P. J. Burkhardt, L. V. Gregor

The oxidation kinetics of single-crystal silicon has been investigated using extremely dry oxygen as the oxidant. Two techniques were used. The first involved a flow system with which incremental thickness measurements were made. This sytem provided an oxygen ambient at atmospheric pressure which had a moisture content of less than 0.1 ppm of water. The second technique involved measuring the change in volume of oxygen with time in a closed system. A temperature range of 900O to 1200 "C and a pressure range of 20 to 760 Tory were covered. Both techniques showed that a simple parabolic rate law holds only at the higher temperatures. At lower temperatures, the data up to 5000Å can be fitted well to a linear-parabolic equation. The two constants in this rate equation are examined in terms of a physical model. The parabolic portion of the low-temperature oxidatLon fits along the high-temperature curve of an Arrhenius plot. The parabolic rate constant for the flow-system technique can be expressed by k = 2 x 10-9 exp (L 31 kcalRT) sq cm per sec. The manostatic technique gave k = 1 x 10-exp (- 23 kcalRT) sq cm per sec. By extending the thickness range to over 104. a rate law of X = At seems to fit all of the data better than the linear-Pavabolic law. Here the exponent n increases from 0.518 at 1150 V to 0.637 at 900°C. PASSIVATION of silicon planar devices through thermal oxidation is of such great importance that considerable effort has been devoted to the study of the process.17 Much of this work involves hydrothermal oxidation, in which H2O is the oxidant: whereby H2 is produced. It has been proposed that the reaction proceeds by the formation of Si-OH groups and hydroxyl diffusion through the film to react with the silicon surface. Thus, the silicon oxide layer probably contains residual hydrogen in some form after oxidation in H2O and it has already been established that hydrogen has a marked effect on the electronic properties of oxide-passivated silicon surfaces. Silicon is oxidized by oxygen at elevated temperatures; but the rate of oxide formation is considerably lower than that for 0." By using dry O2 as the sole oxidant, the presence of residual hydrogen is presumably avoided. At present, the mechanism of thermal oxidation by dry O2 is a matter for conjecture, and the presence of small amounts of H2O was reported to have a marked effect on the rate of oxide formation10 (perhaps on the electronic properties of the surface, as well). Hence, this study of the kinetics of silicon oxide growth in 0, was undertaken: 1) to determine the oxidation rate at atmospheric pressure in a system designed to exclude rigorously all traces of H2O in the ambient 0,; 2) to obtain oxidation-rate data in situ in dry O2 by means of a continuous monitoring of the amount of 0, consumed during oxide growth. These objectives are complementary—the first assesses what effects (if any) are obtained by excluding H2O from the reaction, and the second expands this information while at the same time avoiding the uncertainty inherent in relying upon incremental measurements of oxide growth to furnish kinetic data. EXPERIMENTAL PROCEDURE The conventional silica open tube in a resistance-heated oxidation furnace is subject to sources of trace H2O, even after the input O2 is thoroughly dried and the outlet gas stream is passed through a trap to prevent

Jan 1, 1967

By Richard I. Petritz

A brief review of today's processing of integvated circuits is given. The major trends in the development of advanced integvated electronics are identified as 1) the broadening of the integvated circuit concept to a large class of circuit function, 2) the processing of more complex circuits within relatively small chips of silicon, and 3) the processing of very large electronic functions on complete slices of silicon. This latter trend, called array technology, is then developed in detail. Emphasis is given to defining the key tech-nological problems. Current progress being made is illustrated. THIS paper will endeavor to identify the major trends in advanced integrated electronics technology. One of these, array technology, will be developed in some detail. The array technology discussion will identify the key problem areas. Since it is the scope of the entire meeting' to present specific progress in the science and technology of integrated electronics, we shall indicate general directions being explored rather than discuss comprehensively solutions to the problems. In order to set the stage for the discussion of future trends in integrated-electronics technology, let us briefly compare the processes by which circuits are fabricated through discrete-device technology with that of integrated circuits technology. The reader is referred to the December 1964 issue of Proceedings of IEEE2 for a comprehensive review of integrated electronics. The article3 by Jay Lathrop is an excellent discussion of integrated-circuits technology. A discussion of the history of semiconductor technology is contained in Ref. 4. A) Current Status of Integrated Electronics. Fig. 1 (top) shows the process by which circuits are constructed from discrete devices. Key points are: 1) Slices containing large numbers of transistors or diodes are processed separately. 2) The slices are scribed into small chips (on the order of 15 mils on a side is about as small as can be conveniently handled) each chip containing one transistor. 3) Each device is specified separately—circuit -function specs are derived largely from device specs. 4) Circuits are formed by connecting together the discrete devices. 5) The number of circuit connections required is approximately equal to the number of devices. 6) There are potentially many more discrete devices per inch2 of semiconductor—only our lack of ability to handle them in discrete form prevents us from going to several orders of magnitude higher density iin Fig. 1, 400,000 transistors are discussed at 1.5 mils on a side). The bottom part of Fig. 1 illustrates the integrated circuit process. Key points are: 1) On the same slice of silicon, transistors, diodes, and resistors are processed grouped to do a complete circuit function. 2) While still in slice form, the components are interconnected into circuit functions by an evaporation process, eliminating the need for separate interconnection steps later. Dramatic improvements in cost and reliability are realized. With a simple flash of metalization thousands of interconnections are reliably made. 3) The slices are scribed into chips which contain complete circuit functions. 4) The circuit functions are specified-not each component in the circuit. This important point was missed by some of the early opponents to integrated circuitry. They argued that, with device yields at x pct, integrated circuit yields would be pct, where n is the required number of devices to make a circuit. This argument leads to extremely low yields for integrated circuits. The fallacy of the argument is that in integrated circuits each device is not specified separately. Furthermore, since a device is forever integrated into a specific circuit function, it need meet only the requirements for that particular function. Discrete devices, on the other hand, are tightly specified so that they can be applied to a variety of circuit functions. 5) Extremely high packing densities are achievable because one need only make the basic devices as large as the circuit demands. Their size is not dictated by handling requirements. A current example

Jan 1, 1967

By A. D. McMaster, M. L. Gimpl, N. Fuschillo

Low-power, high-speed, radiation-resistant, monolithic thin-film integrated circuits require thin-film resistors of high sheet resistance which are compatible with the processing requirements for monolithic silicon devices. For this purpose the structure and electrical resistance as a function of temperature were investigated for Nichrome-silicon monoxide cermet films on passivated single-crystal silicon substrates. A suitable material was found to be a mixture of 50 vol pct Nichrome-50 vol pct silicon monoxide. This mixture, when evaporated onto 300°C substrates. showed a low temperature coefficient up to 400°C, at both 270 and 1100 ohms per square. Resistors deposited on room-temperature, 300°, and 500°C substrates were heat-treated at 600°C in air for short periods of H- seed, low-power, radiation-re sis tant, monolithic thin-film integrated circuits'-3 require thin-film resistors of high sheet resistance and low temperature coefficients of resistance which are compatible with the processing requirements for monolithic silicon active devices. The present investigation is directed towards the replacement of the Nichrome in the sandwich-type SO2-Nichrome-SiO resistors, currently used for DTL monolithic thin-film integrated circuits, with codeposited Nichrome-SiO cermet resistors. These Nichrome-SiO resistors are provided with an overcoat of SiO and are deposited onto thermally oxidized silicon wafers used in monolithic mi-crocircuit technology. The cermet resistors are shown to provide a lower temperature coefficient of time totaling up to 45 min. Electron nzicrogvaphs and diffraction patterns were taken of the as - deposited and heat-treated films. These results were then compared with electrical-resistance measurements for each condition. The room-temperature and 300°C substrate films showed a large decrease in resistance. The 500°C substrate film remained stable throughout the entire cycle. Electron-microscopy results show that the increased stability after heating to 600°C is largely due to crystallization of the films which begins in the vicinity of 400°C. The slight oxidation of the films when heated in air had a negligible effect on the resistance. The resistance of the film was a function of the substructure. resistance and a more versatile compatibility with silicon monolithic processing. Previous work3, on chromium-SiO coevaporated cermet resistors on glass and ceramic substrates without overcoats of SiO has been reported. For the present application, the thin films should possess the following ideal requirements: a) a temperature coefficient of resistance as near zero as possible up to 300°C; b) have a sheet resistance higher than 200 ohms per sq to conserve space on the chip; c) be easy to evaporate; d) be oxidiation- and radiation-resistant; e) show long-time stability at 100°C; } be stable in N2 atmospheres up to 600°C for short periods of time (5 to 45 min). Requirements a to e are well-known. The last requirement was optional and was due to a mask elimi-

Jan 1, 1967

By J. M. Blank, V. A. Russell

When the nucleation of silicon on a sapphire substrate is accomplished by gradually decreasing the substrate temperature while subjecting it to a constant impingement rate of hydrogen and silicon tetrachloride, the resulting deposit is characterized by widely separated islands of silicon scattered over an "open sea" of sapphire. Analysis shows that nucleation takes place mainly on sites of large adsorption energy, about 85 kcal per mole, and small surface concentration, about 108 cm-2. Crystal growth proceeds rapidly on these nuclei and results in enough depletion of Sicl4 from the ambient gas to suppress further nucleation. The technological importance of single-crystal films on dielectric substrates has prompted considerable work on the deposition of silicon on sapphire. This paper is concerned with the deposition of silicon, by the reduction of silicon tetrachloride with hydrogen, onto heated sapphire substrates. The apparatus consisted of a temperature-controlled container for the silicon tetrachloride along with gas lines and flow meters necessary to convey a hydrogen-silicon tetrachloride mixture to a reaction chamber constructed of quartz tubing. Heat for the substrate was provided by means of an inductively heated graphite susceptor. The observations pertinent to the present discussion were made with an American Optical Co. high-temperature microscope which allowed us to make motion pictures of the deposition process at a magnification of approximately 50 times. Two main categories of experiments were carried out: one on determination of critical condensation temperatures and the other on the deposition of epitaxial silicon films on the sapphire substrates. Critical condensation temperatures were determined in the traditional way by raising the substrate temperature well above that at which condensation could be expected at the impingement rates being studied and then gradually lowering the temperature until the condensation of the first silicon was observed. This was done initially with ellipsometry-type detection but it was soon discovered that the deposits were occurring as widely separated islands and groups of islands scattered over an "open sea" of sapphire. We have called these archipelago formations. They were most easily detected by optical microscopy. Data gathered from experiments of this type have been collected in Table I. Motion pictures of the formation of archipelago patterns show that the nucleation period lasts about 10 sec if the substrate temperature and impingement rate are kept constant. Essentially all of the nuclei are formed in a few seconds and all subsequent silicon deposition merely adds to the size of the established nuclei. After an archipelago formation has matured at a given substrate temperature and impingement rate, it is very difficult to stimulate any further nucleation in the open space between islands. Lowering the substrate temperature will occasionally stimulate nucleation but increasing the impingement rate hardly ever produces any more new nuclei. It should also be emphasized that the nucleation rates appear to be very small, about 104 cm-2 sec-1. They will receive special attention in the analysis section. Another series of experiments was performed employing a systematic variation of substrate temperatures and impingement rates approximating those expected to produce epitaxy. Sapphire substrates with surfaces normal to the 2233 direction were used. In contrast to the procedure that produces archipelago patterns, these films were deposited by raising the substrate temperature to a desired value at which time the silicon tetrachloride and hydrogen flow was begun. Of course, these depositions produced mainly films that were continuous. After removal from the deposition chamber, the substrate and silicon film were examined microscopically to determine the nature of the deposit and by X-ray diffraction to determine the extent to which a single-crystal film had been achieved. Results of these experiments are summarized in Table 11. Of interest for the present analysis is the fact that epitaxy appears to be confined to a fairly narrow temperature range between about 1050" and 1150°C. This also will be discussed in the analysis section. ANALYSIS In this section we shall apply nucleation theory to the data presented above with the objective of testing

Jan 1, 1967

By A. D. McMaster, M. L. Gimpl, N. Fuschillo

There is interest in the use of rhenium metal films as resistive elements in thin-film circcits, and already some zvork has been done using er)aporated rhenium films. It has been found that rheniim films protected from the atmosphere by an evaporated layer of silicon monoxide show excellent electrical stability. Unprotected films, however, are subject to aging- effects, notably the increase in electrical resistivity as a function of time. This phenomenon can be understood as primarily one of oxidation of the thin films. This paper is concerned with the study of the oxidation and crystallization behavior of such unprotected films. It has been found that the oxidation rates are a function of the substrate temperatures used during the deposition of Lhe metal films. The strictures observed in the films are correlated with the film resistivities and some data are presented to establish the existence of the various types of oxides of rhenium. ThERE is some interest in the use of thin films of rhenium metal as resistive elements in monolithic, thin-film integrated circuits. Some work has been done using evaporated films and it has been found that such films, if protected from the atmosphere by an evaporated layer of silicon monoxide, show excellent electrical stability up to temperatures of 500"." Rhenium films unprotected from the atmosphere tend to age and the electrical resistivity of the films increases as a function of time. Rhenium films, of the order of <100A thick, prepared by electron-beam evaporation techniques are found to oxidize very readily when exposed to dry air at room temperature. It would seem, therefore, that this aging phenomenon could be attributed to the oxidation of the metal films. In this investigation, the oxidation and crystallization behavior of thin films of rhenium evaporated onto silicon monoxide substrates were studied as a function of the substrate temperatures used during the evaporation. The films were examined using electron-microscopy and electron-diffraction techniques. EXPERIMENTAL RESULTS Rhenium metal was evaporated onto suitable prepared substrates which were heated to various temperatures. The evaporations were performed in a vacuum of approximately 5 x 1CT5 torr. The evaporation was carried out at a rate of approximately 10A per omin. The final film thickness was approximately lOOA and the resistance ranged from 5000 to 10,000 ohms per square. The substrates used for supporting the metal films were made by evaporating 75A of silicon monoxide onto freshly cleaved mica. The silicon monoxide film was then floated off the mica by immersing the composite in water. The film could then be picked up on a clean nickel grid. Silicon monoxide substrates were chosen because of their similarity to quartz and glass substrates commonly used for making thin-film resistors. Fuschillo, Gimpl, and McMas-ter have also shown that silicon monoxide films have only minor structural changes at temperatures up to 800°C. This fact simplified the interpretation of any changes observed in the electron micrographs or electron-diffraction patterns obtained from the deposited rhenium films. After the evaporations were completed, the substrates were cooled to room temperature, except where noted differently, before the coated substrates were removed from the vacuum system. All aging of the deposited films was done in a desiccator. The evaporated films were examined in an electron microscope equipped with a hot stage that would permit continuous observations of the samples up to temperatures of 1000°C. RESULTS A series of electron micrographs of the rhenium films deposited on the silicon monoxide substrates are shown to Figs. 1 to 3. In all cases, the metal films are approximately 100A thick and the micrographs were taken 1 hr after the deposition was completed. here was no apparent structure in the films deposited on the substrates held at the higher temperatures. The

Jan 1, 1967

By J. H. Reynolds

The possibility of using a semiconductor, metal, semiconductor structure as a light detector is discussed. A brief theoretical argument is presented which predicts that this structure should have pho-toresponse characteristics similur to those of a metal-semiconductor diode, but with the magnitude of the current increased by a transistor gain factor. Measurements made at low frequencies on a particulur S-M-S device agree u~th this prediction aizd shoul that significant gain factors are attainable. The current gain is substantially higher than that predicted for the metal base transistor. It is proposed that the operation of these units is more closely approxinzated by the metal-gate model which predicts higher current gains. A qualitative discussion of its high-frequency performance indicates that detection of light modulated at microwave frequencies by a S-M-S deuice is possible. ADVANCES in the technology of chemical vapor deposition&apos;-4 have made it possible to form a S-M-S structure consisting of a thin metallic layer sandwiched between layers of single-crystal semiconductor. It has been proposed5-7 that, if the metal layer is made sufficiently thin, this structure could be used in an amplifier having several advantages over presently available transistors including higher-frequency performance. Calculations8 predict that the maximum gain-bandwidth product is nearly an order of magnitude higher than that of a bipolar transistor having the same geometry. Maximum oscillating frequencies in the microwave range are predicted. Electrical measurements made on S-M-S devices have shown that, although the theoretical frequency characteristics are not presently attainable, current and power gain is obtained. Another possible application of the S-M-S structure is its use in a light detector. This structure is a three-layer relative of the metal-semiconductor diode. Light detection using M-S diodes is the subject of considerable present interest. They are known to have a short response time and the ability to detect light having a photon energy below the semiconductor bandgap. In this paper, the mechanism by which S-M-S photocurrent is generated is discussed. An expression is derived which shows that the response characteristics are similar to those of a M-S diode, but that the magnitude of the current is increased due to the transistorlike behavior of the device. The results of low-frequency response measurements on a particular S-M-S structure are presented. These agree with the theoretical predictions and show that significant gain factors are attainable. A qualitative discussion of the high-frequency characteristics is presented which predicts that detection of light at microwave frequencies by a S-M-S device is possible. THEORY In this discussion, the photocurrent, iT, measured across terminals attached to the semiconductor emitter and collector layers is related to the current pho-toemitted from the metal base layer. The latter will be referred to as the primary photocurrent. The behavior of the primary photocurrent is determined by the characteristics of the two metal-semiconductor diodes. The diode photoemission is illustrated in Fig. 1, which shows the emitter and collector potential barriers. The metal thickness has been greatly exaggerated. As will be discussed later, the actual barrier shape can be much more complex, but this diagram illustrates the essential features of the photoemission process. An absorbed photon having an energy greater than the barrier height can emit an electron into the emitter or collector. Since this process is discussed

Jan 1, 1968

By M. E. Straumanis, J. -P. Krumme

In basic ([KOH + KCl] with a total polarity of 2) or acidic (2N H2SO4) electrolytes and at anodic current densities of more thun 2 to 4 ma per sq cnz, n-type GaAs single crystals of lozo resistivity preferentially dissol~je forming etch tunnels with triangular or civc~ilay cross sections and of a width between 0.5 arid 5 p. These etch tunnels are oriented along any one of the four possible (111) directions of GaAs. However, their growth occurs only in one direction of a given (111) whick apparently is determined by the atomic sequence Ga —As (and not the rezlerse) in respect to an individual valence bridge in the crystal. It is concluded from comparison with the cubic lattice structure of GaAs that the etch tunnels represent macroscopic evidence for the tetrahedral bonds and their polar properties. If the anodic current density is increased the tunnel fomation results in the development of a fibrous surface layer consisting of GaAs. The latter separates frorn the substrate (in an anodic s~irface disintegration process) by the growth pressure of an As,0, filnz forming in the interior of the fibrous layer, 100 to 200 µ under the surface, at more than about 50 ma per sq cni. The fibrous GaAs film has the same crystallographic orientation as the substvate and represents a skeleton of the original crystal. Since the etch-tunnel density in a separated GaAs layer is about 108 c?n-&apos;, and the etch tunnels develop only along (111) in a given polar direction, it is assurraed tlmt the dislocations have no influence on the growth of these tunnels. ElECTROLYTIC treatment of smooth surfaces of poly- and single-crystalline GaAs at high anodic current densities causes the formation of porous surface layers.&apos; This phenomenon suggests comparison with effects being observed with magnesium,&apos; indium,, gallium,4 and aluminum5 and known as "anodic disintegration". The purpose of the present paper is to explore and to explain the reasons for the formation of such surface layers on GaAs and, in particular, to investigate the influence of the lattice polarity of this III-V compound semiconductor in the (111) direction on the anodic dissolution behavior. GaAs SINGLE CRYSTALS For the experiments described below GaAs single crystals from the Monsanto Co., St. Louis, Mo., were used. Their impurity levels were below 1 ppm and their dopant levels between 1 and 100 ppm. They were grown in (111) using the Czochralski or the gradient-freeze technique. The crystals had n-type conductivity and electric resistivities between 1 and 5 ohm-cm. EXPERIMENTAL The GaAs single-crystal rods were cut perpendicularly to (111) into wafers of about 1 mm thickness using a wire-blade crystal slicer and an aqueous slurry of Sic or a diamond saw. The orientation of the faces of these wafers were checked by Laue back-reflection patterns. If there was a deviation from (111) the faces were abraded under a certain angle using grinding paper and distilled water. The damaged surface layer was removed from each crystal by chemical etching with a mixture of 1HF:1HNO3: 1H20 or 2HF:1HNO3:2HAc (glacial). {110) faces were obtained by mechanical cleavage, producing surfaces which did not require a further treatment. The GaAs wafers were mounted using "alligator" clamps instead of soldered electrical contacts.&apos; Only the bare crystal surfaces were dipped into the electrolyte. The clamps were coated with insulating wax to prevent any contact with the electrolyte. The experiments were carried out in aqueous 2 N H2so4,&apos; or in an aqueous solution of KOH and KCl1 (1 mole KOH + 1 mole KCl in 1000 cu cm solution). Anodic current densities up to several hundred ma per sq cm were applied for periods between 30 sec and 2 hr. For the purpose of investigating the initial steps of disintegration the anodic current density applied never exceeded 20 ma per sq cm. The films which partially separated from the anodic surfaces under high-field conditions were treated with KOH to further their detachment by dissolving the As2O3 formed. The washed and dried films were pasted to strips of filter paper, and Laue pictures were made. The back-reflection patterns obtained were compared with those of the original anode surface before and after anodic dissolution. Furthermore, space reciprocal lattices7 were constructed from asymmetric rotation crystal patternsa which permitted the determination of the crystallographic orientation of the detached films of the corrugated anodic surfaces. The disintegration products were identified from assymmetric powder patterns.8 The polarity of the {111) faces was determined by chemical etching with mixtures of 1HF:1H2O2(30 pct): 2H2O or 1HNO3:2H2O. Different patterns on each of two inverse (111) sides appeared.&apos;-l8 The correlation of these patterns to the Ga{111) or the As(111) side has already been established by the use of light figures,18-20 by X-ray diffraction near the absorption edges of gallium and arsenic,&apos;lmZ4 and by LEED measurements.25 The geometric structure of these surfaces and the interior of the anodically attacked crystals were observed and photographed with a high-power microscope using oil immersion objectives up to magnification of X1720.

Jan 1, 1968

By D. C. Reynolds

Recent experiments with II-VI compounds have shown that they hazle considerable potential for laser applications over a broad region of the optical spectrum. It may be possible to cover the spectrum continuously from 3200A (ZnS) to the far infrared (CdHg:Te) since HgTe is a semimetal. At this writing laser action has been observed in ZnS, Zn0, CdS, CdSe, CdS:Se, CdTe, and some of the CdHg:Te alloys. Of particular interest are those lasers operating in the zlisible and near ultraciolet regzons of the spectrum where detectors of high sensitivity are available. The lasing transitions in II-VI compounds are bound exciton transitions some of which have been identified in auxiliary experiments. High efficiencies and low thresholds for lasing hare been achieved almost exc1usively in plutelet-type crystals. The greater crystalline quality exhibited by the phtelet-type material is shown to result from the crystal growth habit. Phonon scattering- of conduction electrons to the ground-state exciton is discussed ill relution to Lou thresholds and high efficiencies for lasing- observed in the CdS:Se solid solutions. The first successful semiconductor laser operation was achieved in the III-V compounds. It is possible to choose a material in this group that will operate between approximately 0.65 and 8.5 . There are at least two reasons why one would like to have a laser operating at shorter wavelengths. First, it would be easier to experiment with a laser operating in the visible region of the spectrum, and also more desirable to have high-in tensity visible light sources. Second, the most sensitive photomul-tiplier detectors are available in the visible and near ultraviolet regions of the spectrum. It is known that II-VI compounds are direct-band-gap semiconductors and as such offer the potential of operating at any specified wavelength between 3200 (ZnS) and 7772A (CdTe). Light emission from II-VI compounds has been the subject of numerous investigations for many years. These investigations were all primarily concerned with noncoherent emission. It has been only recently that coherent emission from these compounds has been observed. To date, laser operation has been demonstrated in CdS, CdSe, and the solid solutions of CdS:Se, ZnS, ZnO, and CdTe. These compounds cover an appreciable portion of the optical spectrum from the ultraviolet to the near infrared. In considering laser applications, the use of lasers in communication&apos;s systems offers many desirable features. In any operation of this type one must consider the losses in transmitting the radiation from the source to the detector. Atmospheric absorption in the visible and near ultraviolet is variable and greater than in certain regions of the infrared. It might be concluded that for long-range communication systems an infrared laser operating in a spectral region that is coincident with a transmission window in the atmosphere would be preferable. However, one cannot overlook the possibility of operating a system in the sensitive region of a highly sensitive photomultiplier detector or other light-amplifying system. LASER CONSIDERATIONS To produce a source of coherent radiation it is necessary to achieve a population inversion. In the case of semiconducting materials it is necessary to raise the electrons from one energy state to a higher-energy state relative to it. In semiconductors, this population inversion can be achieved by three different techniques: 1) Current Injection. This technique uses a p-n junction biased in the forward direction. Large numbers of electrons are injected from the n region into the p region, and recombination occurs close to the junction. An inverted population is obtained in this region and the recombination radiation propagates parallel to the junction. This type of pumping has been used in the GaAs junction-type lasers but has not been successfully employed in the II-VI compounds. 2) Optical Pumping. In this case, one uses photons to obtain a population inversion by exciting electrons to higher-energy states. The pump sources are flash lamps or arc lamps and, occasionally, other laser sources when such sources have the appropriate energy for exciting the electrons. The disadvantage of this type of pumping is that flash lamps put out a rather broad spectrum of radiation, whereas the laser material has a rather narrow region of absorption. This results in an inefficient process. Laser sources provide efficient pump sources but the number of usable wavelengths is limited. 3) Electron Beam Pumping. In this technique, the laser sample cavity is bombarded with electrons having energies in the range from approximately 10 to a few hundred kv. The bombarding radiation excites electrons from valence to conduction band states in the semiconductor, giving rise to an inverted population. This type of pumping has been used successfully in several 11-VI compounds.

Jan 1, 1968

By Richard H. Bube

Photoelectronic radiation detectors may be conveniently classified as homogeneous intrinsic, homogeneom extrinsic, or junction type. Highly photosensitive homogeneous intrinsic photodetectors may be prepared from a number of different II-VI, III-V, or IV materials. Such materials require the presence of specific imperfections that can act as sensitizing centers to provide long majority carrier lifetime. Homogeneous extrinsic photodetectors are of interest primarity for infrared detection, and consist principully of germaniuim and silicon with suitable inpurities. A vaviety of junction photodetectors exist, with silicon us the most common material for them all. The following extrema in performance are found: 1) highest photoconductivity gain in homogeneous intrinsic photodetectors; 2) smallest response time (highest frequency response) in p-i-n junctions; 3) largest gain-bandwidth product in avalanche diodes. ALTHOUGH the total number of materials exhibiting photoconductivity effects is very large, only a relatively few of these have appropriate properties for a practical photoelectronic radiation detector. In fact if one surveys the commercial detectors currently available, one finds that the field is dominated by some ten or fewer materials. These are summarized in Table 1 in terms of the other important variable in detector fabrication, the structure of the material, i.e., whether the material is used as a single crystal or in polycrystalline form, and whether the material is used as a homogeneous detector or whether the detector depends upon the existence of a junction or barrier in the material. The principal wavelength range for each type of material is also shown, together with an indication of the utilization of intrinsic or extrinsic excitation. For the purposes of the present comparison of various detectors, it will be convenient to discuss two main topics: homogeneous photodetectors and junction photodetectors. The performance of a photoelectronic radiation detector is measured in terms of two parameters: the photoconductivity gain, and the response time of the detector. A convenient figure-of-merit is given by the ratio of gain to response time, often called the gain-bandwidth product. The photoconductivity gain is a device parameter since it varies in many cases with the applied voltage and the detector geometry, and should be distinguished from the actual photosensitivity of the material involved. This photosensitivity can be conveniently given as the product of free carrier lifetime and mobility in the material. The photoconductivity gain is defined as the number of charge carriers which pass between the electrodes per second for each photon absorbed per second, where G is the photoconductivity gain, is the pho-tocurrent in amperes, e is the electronic charge in coulombs, and F is the total number of electron-hole pairs created in the photo conductor per second by the absorption of light. The gain may also be expressed as the ratio of the lifetime of a free carrier to the transit time for that carrier, i.e., the time required for the carrier to move between the electrodes. For a material in which one-carrier conductivity dominates, where T is the lifetime of a free carrier, ttr is the transit time for this carrier, p is the carrier mobil-ity, V is the applied voltage, and L is the electrode spacing. From Eq. [2] it follows that the photoconductivity gain is proportional to the photosensitivity of the material (tP), the proportionality constant being The photosensitivity of a material, and hence the photoconductivity gain of a device utilizing the material, depends on the lifetime of the free carriers as a critical parameter. In a homogeneous material this lifetime is determined by the nature of imperfections in the material, and in an inhomogeneous material the lifetime is determined by the specific junction structure. The speed of response, the other basic photodetec-tor parameter, is determined by factors quite similar to those important for photoconductivity gain. Imperfections are of primary importance in homogeneous materials, and the structure of the junction is a determining factor in junction devices. For infrared detectors it has become common to define another quantity designed to indicate directly how effective the detector is in distinguishing between a small photoconductivity signal and random noise due to the detector and its environment. The detectivity D* is given by

Jan 1, 1968

By H. M. Dess, S. R. Bolin

A modifiedl Czochralski technique has been utilized to grow single crystals of YVO, pure or doped with europium or neodymium, from 1 to 2 in. long and 4 to 1/2 in. in dianz. An oxyhydrog-en gas-fired furftace zuas used in this ulork, and melts were contained in iridium crucibles. Successful application of the Czochralski ~vzethod was found to depend upon atmosphere control to prevent crusting and to limit melt decomposition, the establishment of symmetrical thermal gradients in the melt to obtain stable growth, and the selection of high-quality single-crystal seeds to prevent propagation of misorientations during growth and subsequent catastrophic cracking. The suitability of YVO4 as a host for laser-active trivalent rare earth ions has long been recognized. However, the problems associated with the growth of sufficiently large, good-quality single crystals have, until quite recently, seriously hindered satisfactory evaluation of the laser potentialities of this material. Both flux growth and Czochralski growth techniques were investigated at an early stage of interest in YVO,. The former method proved incapable of yielding crystals large enough for practical use,ly2 and the latter was beset with difficulties which took some considerable time to understand and overcome. Recently, however, the Czochralski growth process for YVO, has been improved along separate but similar lines of development by groups working independently in the Crystal Products Department of Union Carbide&apos;s Electronics Division and Bell Telephone Laboratories3 so that now good-quality single crystals of satisfactory size can be produced on a routine basis. Stimulated emission from a neodymium-doped YVO4 crystal grown by the Crystal Products Department of Union Carbide was obtained by O&apos;connor4 of MIT, Lincoln Labs. An oxyhydrogen gas-fired furnace was used in this work, Fig. 1, and melts were contained in iridium crucibles. The starting material was 99.9 to 99.99 pct pure YVO4 powder purchased from the Chemical and Metallurgical Division of the Sylvania Electric Products Co. Typical impurity levels, determined by spectrographic analyses, were as follows: Si, 50 to 500 ppm Al, Fe, Mg, 5 to 50 ppm Ni, Pb, Mo, Mn, Ce, Cs, 1 to 10 ppm Initially, YV04 powders predoped with neodymium or europium were obtained from Sylvania. Later, however, because of a desire to grow a series of crystals containing relatively broad concentration ranges of these dopants, it proved more convenient to start with pure YV04 and mechanically admix Nd2O3 or Eu@~ powders plus equimolar amounts of V2O5. The empty crucibles were preheated to 1900" to 1950oC, a temperature range where melting occurred readily. The powdered YVO4 feedstock was then added incrementally. However, a marked tendency toward

Jan 1, 1968