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By John W. Wagner, Robert K. Willardson

Single crystals of Pbl-xSnXTe have been grown from The melt under liquid B2O3 using the Czochralski technique. The PbTe-SnTe crystals were grown from near-stoichiometric melts and from melts with slight deviations from sloichiometry. Crystal growth rates ranging from 1 mm per hr to 1 cm per hr were employed, the latter being generally used. Several investigations were performed to characterize the single crystals grown In this study. The phase diagram of the PbTe-SnTe system was examined. X-ray analyses verified the single-crystal character of the crystals, and powder pattern lattice parameter determinations showed that Vegard's law was followed within the limits of the experimental error. The as-grown crystals were p-type with apparent carrier concentrations of -8 x 1018 to -8 x 1020 carriers per cu cm. Hall coefficients, resistivities, and carrier mobilities were determined as a function of composition. Dislocations were revealed by an electrolytic etch, and the crystals were found typically to contain 2 to 4 x 105 dislocations per sq cm. Microhardness measurements were performed; no maximum in the Vickers hardness us composition curve was seen. Mass spectrometry was used for impurity analyses, and the crystals were found to contain 1 to 2 x 1017 total p-type impurities per cubic centimeter. Distribution coefficients were calculated for the major impurities which were Na, Mg, Al, Si, Cl, and Zn. RECENTLY interest has been stimulated in the preparation and characterization of many alloys of the binary compound semiconductors. This interest is due primarily to the almost unlimited possibilities of adjusting the semiconducting characteristics of these materials by varying the alloy compositions. One alloy system which has been receiving extensive investigation is the PbTe-SnTe system, since these alloys show promise of being useful as emitters and detectors of electromagnetic radiation in the spectral range of 8 to 14 µ. This paper reports on the growth of PbTe-SnTe single crystals by the Czochralski technique and investigations of the general properties of these crystals. The phase diagram of the PbTe-SnTe system was investigated so that specific alloy compositions could be attained. I) CRYSTAL GROWTH The PbTe-SnTe single crystals were pulled from the melt using the Czochralski technique. Generally, the crystals were grown from near-stoichiometric melts, although special growth runs were made from both lead-rich and tellurium-rich melts. Growth of single crystals from up to 5 pct lead-rich melts presented no problems; however, melts with tellurium in excess of -1 pct caused volatilization problems which generally made crystal growth impossible. All melts were prepared from high-purity materials as follows: 1) lead— 6 N— Cominco (Cominco Products, Inc., Spokane, Wash.); 2) tin—5N—Cominco; and 3) tellurium— 5N+— American Smelting & Refining Co., Plainfield, N.J. No further purification of materials was undertaken in this study. The elements were reacted at -1000°C in a vacuum-sealed silica tube for a few hours, a gentle rocking action being used to ensure thorough reaction. The cast ingots were then transferred to a silica crucible for crystal growth. A schematic diagram of the growth apparatus is shown in Fig. 1. The Vycor tube is sealed at both ends by O-ring flanges so that a vacuum or a positive pressure may be maintained in the growth chamber. The pull rod and crucible may be rotated; all crystals produced in this study were grown with the crucible sta-

Jan 1, 1969

By Robert C. Linares

Cubic zinc sulfide has been grown from molten salt solutions substantially below the hexagonal-cubic phase transition of 1020°C. Crystals free of birefringence have been grown from molten lead chloride at temperatures from 500° to 800°C. Factors affecting the optical transmission and the birefringence are discussed. CUBIC zinc sulfide is of interest for electrooptic devices and as an optical coating material. However, it cannot readily be produced as large crystals which are free of birefringence. The birefringence arises from the fact that the cubic ZnS is usually grown as the high-temperature hexagonal phase and is transformed to the lower cubic phase by annealing.' This results in stacking faults, stress, and birefringence. A requirement for the growth of cubic ZnS is that it be grown below the phase transition of 1020°C.2 Crystals of cubic ZnS have been grown below 1020°C by the hydrothermal,3 flux,4 and vapor transport5 techniques. However, these all appear to have limitations in size or quality of material produced. It was felt that a new flux method might have a good chance of overcoming some of the previous problems. Mita6 reported the growth of hexagonal ZnS from molten NaCl and wilke7 reported the growth of iron sulfides from molten lead chloride solution, indicating that molten chlorides make good solvents for sulfides. An investigation of a number of possible molten chlorides as solvents showed that molten PbCl2 has an appreciable solubility for zinc sulfide and that crystals can be grown at temperatures from 500° to 800°C. EXPERIMENTAL Crystal growth was performed in open or sealed Vycor or fused silica tubes, in an argon atmosphere or vacuum. There were no deleterious effects due to using vacuum; however, a sealed essentially isothermal system must be used to prevent vapor transport mechanisms from dominating. This will be discussed later in detail. Noble metal containers were not usable as they were severely attacked by these melts. The materials used were: reagent-grade PbC12, reagent-grade ZnS, optical-coating-grade ZnS, and Irtran 2 (ZnS). Crystal growth was accomplished by both slow cooling techniques and gradient growth techniques. In the slow cooling techniques, 15 g of ZnS and 100 g of PbCl2 were used. The components were placed in the silica tube, heated at 800°C for 2 hr, and then slowly cooled (l° to 10° C per hr) to 500°C. The furnace was constructed so that the tube could be inverted, thus allowing the liquid to drain off the crystals at the end of the run. The gradient runs were made by placing the above mixtures in a silica tube at 550° to 600°c, Fig. 1. A temperature gradient was maintained such that the floating mass of undissolved sulfide was 10° to 50°C warmer than the bottom of the tube. Growth occurred on spontaneously nucleated sites at the cooler bottom. RESULTS When using high cooling rates (5° to 10°C per hr), crystals form in thin sheets perpendicular to the {111} face. Crystals 5 by 5 by 1.2 mm, Fig. 2, have been ob-

Jan 1, 1969

By Jacques Steininger, Robert E. England

Single crystals of ZnTe and ZnTe1-,Sex with x up to 0.13 have been grown from the elements by temperature gradient solution zoning using excess tellurium as a solvent. Best results have been obtained with charges with the compositions 45/55 at. pct Zn, Te, for ZnTe and increasing amounts of selenium for ZnTe1-xSex. The temperature in the molten zone was maintained at about 1070°C with a gradient of about 10°C per cm. Chemical analyses of quenched ZnTe ingots show tellurium concentrations in the molten zone as high as 70 pct with concentration differences across the zone of 1 to 2 at. pct Dark dots which are observed by transmitted light microscopy in as-grown crystals can be removed by annealing in zinc vapor at 900 C. INTEREST in wide band gap semiconductors has led to a new study of ZnTe and ZnTel-xSex crystal growth. ZnTe is the only II-VI compound with a wide band gap (2.3 ev) that can be made p type with low resistivity. Attempts to make it n type with low enough resistivity to be useful for p-n junctions have so far been unsuccessful.1 ZnSe has a band gap of 2.65 ev but can be made n type only. However, ZnTel-xSex solid solutions with x as low as 0.36 have been made both highly n and p type2 with a minimum band gap around 2.12 ev3 at room temperature and appear to hold the best promise for efficient injection electroluminescence in the visible. ZnTe has the lowest melting point of the zinc chal-cogenides (1295°C) and consequently attempts have been made to grow crystals from both the liquid and the vapor phase.4 Complicated apparatus is required for growth from stoichiometric melts because of the high vapor pressures of the elements at the melting point of ZnTe and because of the problem of quartz devitrification. Small crystals have thus been grown in high-pressure equipment by Fischer5 and by Narita et a1.6 with pressures of the order of 50 atm of argon to prevent excessive evaporation from the melt. Large crystals of ZnTe can be obtained by growth from the vapor phase4 but they often present numerous dislocations and inclusions. An improvement in the quality of vapor- grown ZnTe crystals was reported by Albers and Aten7 by equilibration of mixtures of small crystals with compositions lying on either side of the solid single-phase field at fixed temperature. The same technique was later applied by Aten8 to the growth of ZnTe1-xSex crystals with less than 1 pct inhomo-geneity. Because of the higher liquidus temperatures of the solid solutions and the high vapor pressure of selenium, previous attempts to grow ZnTel-xSex from the melt have been limited and unsuccessful.9 The phase diagram of the Zn- Te system is reproduced in Fig. 1, based on data from Kobayashi10 and Kulwicki.11 Carides and Fishher12 have reported lower liquidus temperatures on the tellurium-rich side, but their data would require confirmation. The liquidus temperature on the tellurium-rich side decreases rapidly with increasing tellurium concentration and the Te2 vapor pressure over the liquidus also decreases accordingly.'3 The decrease in liquidus temperature and vapor pressure therefore makes it possible to use conventional apparatus if there is a sufficient excess of tellurium in the melt. Single crystals of ZnTe have thus been grown by Kucza,14 in a modified Bridgman technique, from solutions containing up to 60 at. pct of Te by lowering unsupported quartz ampoules through a temperature gradient at about 1200°C. Under these conditions, the phase diagram indicates that the entire charge is initially molten. Crystal growth can therefore proceed by normal freezing and rejection of excess tellurium into the melt. The modified Bridgman technique has several major limitations. Because of the rejection of excess tellurium into the melt during freezing, the melt composition and the temperature at the growth interface vary continuously. They tend to follow the liquidus until the eutectic which is very close to pure tellurium (447°C, >99 pct Te). Since the solidus composition also varies with temperature,15 crystals grown by this method are inhomogeneous. They present small variations from stoichiometry which may affect their structure and physical properties. The simultaneous increase in tellurium content and decrease in melt temperature also combine to reduce the rate of diffusion of tellurium away from the growth interface, thereby causing constitutional supercooling and possibly dendritic growth. To minimize these effects, the initial melt composition is in practice kept relatively close to stoichiometry (less than 60 pct Te). This however limits the possibilities of operating at low temperatures and pressures. This paper describes a modified method of crystal growth by temperature gradient solution zoning (TGSZ) which is an adaptation of the temperature gradient zone-melting technique developed by pfann16 and of the traveling solvent method of Mlavsky and weinstein.I7 The TGSZ method now applied to the growth of ZnTe and ZnTel-xSex crystals is characterized by its very simple experimental arrangement and sample preparation technique. Unlike the modified Bridgman technique, there is no increase in the tellurium concentration in the melt and therefore it is possible to operate at lower temperatures and pressures. This method is also suitable for maintaining a constant temperature at the growth interface.

Jan 1, 1969

By H. M. Manasevit, R. L. Nolder, L. A. Moudy

The observation that silicon-on-sapphire crystallo-graphic relationships exist which are unrelated to one another implies that there are regions of sapphire orientations containing these relationships which are separated by boundaries. The presence of these boundaries is demonstrated, initially on rounded cylindrical surfaces md more definitively on flat sapphire substrates with orientations along primary crystallograPhic zones. By means of reflection electron and X-ray diffraction techniques the crystallographic relationships have been studied. Two new relationships have been found, viz., (111) Si (1014) sapphire and (001)Si (1012) sapphire. Also found were multicrystalline relationships. The approximated boundaries between the crystallographic regions for each relationship are shown by means of a stereo-graphic projection. These studies also clarify discrepancies in the literature concerning the silicon-sapphire relationships on the (1120) sapphire substrate. SINCE the first report of the deposition of single-crystal silicon on sapphire in 1963' this epitaxial system has been the object of study by many semiconductor laboratories. In particular, there has been strong interest in the crystallographic relationships between the two materials. In 19652,3 we demonstrated that at least four distinct modes of orientation relationships can occur, namely, (100)Si (0112) sapphire, (111)Si 11 (1124) sapphire, (111)Si (1120) sapphire, and (111)Si (0001) sapphire. Each relationship could be obtained when the substrate plane was at the particular orientation indicated. Other workers as well as our laboratory concurred in general with the initial results. However, two discrepancies were observed. First it was observed by Joyce et a1.4 that on a (1120) substrate a (110) silicon deposit could be obtained. This was actually consistent with the (111)Si (1124) sapphire mode. Second, two other laboratories,5,6 as well as our own,7 have found a deposition on the basal plane which is different than our initial findings. Even though a (111)Si deposit was obtained, the crystallographic relationships were not identical to those previously found. Subsequent work in our laboratories has confirmed that the form found in these later investigations of the basal plane is by far the more predominant, and the original finding was an anomaly. The relationships which have been previously estab1.ished are summarized in Table I. It is seen that at present a rather small number of possible substrate orientations has been investigated. Therefore, it seemed appropriate that a systematic investigation of silicon epitaxy on various sapphire substrate orientations would be of value. It was expected that the answers to three questions could be obtained from such an investigation. These are as follows: 1) Since we know of at least four distinct modes of orientation relationships, over what range of substrate orientation do these modes occur and what is the form of the boundary expected between the different regions in which each mode occurs? 2) Are there other modes which occur on substrate orientations not previously investigated? 3) What is the explanation for the discrepancy between our laboratory's findings and those results reported by Joyce et al.4 concerning the relationships occurring on (1120) substrates? APPROACHES AND EXPERIMENTAL METHODS Two different approaches were used. Initially, depositions were carried out on rounded cylindrical surfaces which lay perpendicular to the (0112) plane.* By this means the presence of boundaries and their approximate positions could be determined. Finally and more definitively, depositions on flat sapphire substrates with a variety of orientations, mostly along primary crystallographic zones and about the (1120) plane, were studied by means of reflection electron diffraction and X-ray diffraction (using back-reflection Laue patterns and full circle goniometer techniques) in order to determine crystallographic relationships. The sapphire orientations investigated by these means

Jan 1, 1969

By S. Razi

Injection luminescence of single crystals of rare-earth-activated CdS was investigated. Crystals of CdS:Nd, CdS:Er, and CdS:Yb, grown by the vapor transport technique, were suitably etched and hetero-junctions of Cu2S-CdS were fabricated on one side of the CdS substrate by chemical reaction. The device was then heated to 200°C in an inert atmosphere for 5 min. Static V-I measurements show that at low voltages (V < 1 v) the current is controlled by the junction, while at higher voltages the bulk Properties of the CdS substrate effectively control the current. Because of the large thicknesses no negative resistance was found. Reverse breakdown voltage varied from 5 v, for junctions that were not heat-treated, to 100 v, for diodes that received the proper heat treatment. The rectification ratio, measured in the range of 2 to 10 v, varied from 300 to 3000. Capacitance- voltage measurements indicate a weak dependence of the junction capacity on applied voltage. The capacity was found to increase appreciably with room light illumination. The variation of capacitance with frequency is indicative of a p+-i-n structure. An open-circuit voltage of 0.4 v was measured under an illumination of 100 mw per sq cm. Under forward bias, the bluish-green edge emission characteristic of CdS was observed. No sharp rare earth emission line was observed, which is in contrast to our results using ZnS:Tb, where, under high-voltage excitation, the rare earth emission was dominat over the lattice emission. The absence of rare earth emission implies that either the nature of the rare earth ion is different at the het-erojunction than in the bulk or the probability of energy transfer to the rare earth ion is small. RARE earth elements are playing an increasingly important role in the Synthesis of materials for a variety of purposes, e.g., solid-state lasers, color television screens, and so forth. Interesting systems result when wide-band-gap photoconducting lattices are activated with rare earths. A study of the lumines-

Jan 1, 1969

By J. E. Lawrence

Copper-decorated lattice disorders in silicon have been analyzed by electron transmission microscopy, chemical etching, and P-N junction reverse current measurements before and following different gettering treatments. Lattice disorders acted as the nucleating sites for copper precipitation. Copper precipitates in silicon resist chemical etching, absorb electron beams more than silicon, and cause excess reverse currents. Totally gettered disorders will chemically etch rapidly, be transparent to electron beams at extinction contrast, and not contribute to excess reverse currents. Three different gettering procedures were performed to determine the effectiveness of different EXTRANEOUS metal contamination can alter the minority carrier lifetime and resistivity of bulk silicon as well as cause excessive reverse currents in semiconductor devices. Previous workers have reported such activity for gold,1,2 copper,&apos;-* iron,&apos; and rnanganese.2,5 Gettering is a method employed to render these impurities electrically inactive. However, some property of the junction-degrading metals prevents gettering procedures from being wholly reliable. The comparative effectiveness of gettering with different agents has been the topic of earlier publications.2,3,6-11 Two mechanisms for gettering metallic impurities have been proposed: the distribution coefficient mechanism by Thurmond and Logan7 and the compound formation mechanism by Goetzberger and Shockley.2 Both of these models evolved from data gettering mechanisms. First, phosphorus was allowed to enter a protective SiO2 film but remain away from the Si-SiO2 interface to test the effectiveness of the compound formation gettering mechanism. Second, phosphorus was allowed to enter the backside of silicon wafers to test the effectiveness of the lattice strain gettering mechanism. Finally, nickel was diffused into the backside of silicon wafers to test the effectiveness of the distribution coefficient gettering mechanism. In each case, copper precipitates dissolved as a result of the gettering treatment. Tightly packed precipitates will resist gettering more than loosely packed copper precipitates. acquired by the electrical analyses of gettered semiconductor materials. An electrical analysis, however, cannot identify the fate of the gettered metals. The radiotracer technique has recently been applied to determine the redistribution of metals following different gettering treatments.3,9,10 The spatial resolu tion of the radiotracer technique prevented the analysis of metal precipitates which contribute to the excessive reverse currents of P-N junctions. The gettering processes employed by the earlier workers, almost without exception, allowed the gettering agent to enter the silicon lattice. This procedure makes it quite difficult to differentiate between the distribution coefficient and the compound formation mechanisms. The metallographic analysis of gettered copper precipitates discussed in this work supplements the earlier work by obtaining direct evidence of silicon lattice defects decorated with copper before and following different gettering treatments. The effectiveness of a process which restricts the gettering agent, phosphorus, to a dielectric film and thus away from the silicon lattice is discussed in addition to the ef-

Jan 1, 1969

By Alan J. Strauss

The Group IV elements germanium, tin, and lead form nine 1:1 compounds with the Group VI elements sulfur, selenium, and tellurium. This paper reviews the properties of the pseudobinary solid solutions formed by these compounds, including the extent of mutual solid solubility, temperature-composition phase diagrams, transport properties, deviations from stoichiometry, optical properties, and energy band structure. Particular emphasis is placed on the Pbl-xSnxTe and Pb1-xSn,Se alloys with rocksalt structure, because of current interest in these malerials for generating and detecting infrared ,radiation. ThE Group IV elements germanium, tin, and lead form nine 1:1 compounds with the Group VI elements sulfur, selenium, and tellurium. Some of the physical and electronic properties of these compounds, including their melting points1-8 and energy gaps,4&apos;9-12 are listed in Table I. Four compounds (SnTe, PbS, PbSe, and PbTe) have the cubic rocksalt (Bl) structure. At room temperature GeTe has a rhombohedra1 structure closely related to the B1 structure, into which it is transformed at about 400°C. Four compounds (GeS, GeSe, SnS, and SnSe) have the orthorhombic B29 structure. In samples which have not been intentionally doped with impurities, the electrical conductivity is due primarily to electrons or holes produced by the ionization of donor or acceptor lattice defects associated with deviations from stoichiometry. Undoped samples of PbS, PbSe, and PbTe may be either n type or p type, depending on whether they contain excess lead or an excess of the Group VI element, respectively, but only p-type samples of the other compounds have been reported. This paper will review the properties of the pseudo-binary solid solutions formed by the nine 1:l compounds. The topics to be considered include the extent of mutual solid solubility, temperature-composition phase diagrams, transport properties, deviations from stoichiometry, optical properties, and band structure. Particular emphasis will be placed on the Pb]-xSnxTe and Pbl-xSnxSe alloys with B1 structure, which are promising materials for generating and detecting infrared radiation in the 8 to 14 µm atmospheric window and beyond. MUTUAL SOLID SOLUBILITY The extent of mutual solid solubility in the pseudo-binary systems has been investigated for fourteen of the eighteen ternary systems (in which the two terminal compounds have a common element) and for nine of the eighteen quaternary systems. In most cases, X-ray diffraction measurements made at room temperature were used to determine the structure and lattice parameter(s) of the phase(s) present in samples of various compositions prepared by freezing from the melt. In many investigations, including the extensive studies of Krebs and co-workers,13&apos;14 the samples were annealed at elevated temperatures before X-ray measurements were made. In some cases, metallographic examination and thermal analysis have also been employed. The results for the ternary and quaternary systems are summarized in Tables II and III, respectively. (The original references should be consulted for the annealing temperatures.) The solubility of one compound in the other is at least 5 mol pct in all cases, and is often much larger. Complete solid solubility has been observed in all systems so far investigated in which the terminal compounds have the same structure, although in the PbS-PbTe system complete solubility is limited to elevated temperatures. Thus complete solid solubility occurs in five systems where both compounds have the B1 structure (SnTe-PbTe, PbS-PbSe, PbS-PbTe at temperatures above 805°C, PbSe-PbTe, and SnTe-PbSe) and in three where both compounds have the B29 structure (GeS-SnS. GeSe-~n~e-, and SnS-SnSe), as well as in two involving GeTe and a compound with B1 structure (GeTe-SnTe and GeTe-PbTe). On the basis of thermal analysis data, complete solid solubility at sufficiently high temperatures has also been reported for the GeSe-GeTe2 and SnS- pbS22 systems. This seems unlikely, however,

Jan 1, 1969

By T. H. Ramsey, Richard Shield

A process has been developed for fabricating thin-film resistors that are compatible with integrated circuits. Films are produced by evaporation of single refractory metals using an electron beam heating source. Resistor paths are then made using standard photoresist etching techniques. A low-temperature coefficient of resistance is obtained by control of nucleation during deposition of the film. One application of the process has been the development of a discrete resistor used for current setting in linear integrated circuits. Multiple thin-film resistors were formed on oxidized silicon substrates using molybdenum metal as a source. An evaporated protective layer of SiO2 over the resistor prevents resistance changes which might occur during subsequent high-temperature processing. Properties of a typical resistor are as follows: R = 15.7 ohm per sq, tolerance surface dimensions = 0.028 by 0.028 in., stable after 4000 hr at 0. 75 w without heat sink. THIN-FILM resistors have been investigated for many years with a large selection of usable resistors resulting from a wide variety of materials. Many of the processes necessitate a high degree of complexity but in nearly all cases the conclusions have been that the materials used in each case were acceptable provided the deposition process was reproducible and could be controlled sufficiently to give the required tolerances. It is our opinion that simplicity is still the key to thin-film resistor fabrication. In this regard, the single metal is obviously the simplest process to control, provided all the necessary properties can be obtained. The idea is not original in this laboratory by any means. Others have taken this approach.&apos; It has been demonstrated that a fairly wide range of resistivities can be obtained by careful control of deposition parameters for any given metal, and by selection of several single metals a very broad range of stable resistors can be obtained. The transition from one metal to the next is made when a film becomes too thin for adequate process control or long-term stability. A great deal of emphasis is once again being placed on the thin-film resistor. Although they have been thoroughly studied in the past, new applications have been found that require the properties obtainable only from thin-film resistors. Integrated circuits, in general, are advancing toward higher speeds and radiation environments which require replacement of the present diffused resistors. Linear circuits in particular are requiring high-power, high-precision resistors for the more advanced applications. The particular requirements of some linear circuits are such that a discrete resistor is required. The resistor described in this paper was developed as a 15.7-ohm precision discrete resistor for use in a current regulating circuit requiring a +2 pct end of life overall tolerance, a dissipation of 750 mw, and the ability to operate over a fairly broad temperature range (i.e., a low temperature coefficient of resistance, TCR). State-of-the-art integrated circuit and silicon processing technology lends itself well to the fabrication of thin-film resistors. Not only is the resistor thin film well-suited to integration on individual circuits, but the oxidized silicon surface provides one of

Jan 1, 1969

By M. B. Bever, A. M. Reti, A. K. Jena

The results of this investigation show that in the system SnTe-PbTe l) the solid solutions have small exothermic heats of formation relative to the binary compounds, 2) solid-solution hardening is almost absent, 3) the tin and lead atoms are .randomly distributed on the sublattice occupied by them and do not undergo an ordering transition during a thermal treatment designed to promote such a transition, and 4) the lattice parameter changes linearly with composition. These findings suggest that the solid solutions of tin telluride and lead telluride approach ideal behavior. THE binary compounds SnTe and PbTe form a continuous series of solid solutions.&apos; Information on several physical properties of these solid-solution alloys has been published.1"3 In the work reported here, the heats of formation, microhardness, and lattice parameters of these alloys have been measured and the possibility of an order-disorder transition has been investigated. Order-disorder transitions occur in some solid solutions of binary compounds. In the system Bi2Te3-BizSes, for example, the electropositive bismuth atoms and the electronegative tellurium and selenium atoms always occupy separate layers. In the disordered alloy Bi2Te2Se, the tellurium and selenium atoms are randomly distributed on the layers occupied by them, while in the ordered alloy they occupy distinct layers.4 The NaC1-type (Bl) structure of SnTe-PbTe alloys consists of two sublattices, one of which is occupied by the electropositive tin and lead atoms and the other by the electronegative tellurium atoms; any ordering would be expected to occur in the sublattice occupied by the tin and lead atoms. PREPARATION OF SPECIMENS Polycrystalline specimens of PbTe and Sn1-xPbxTe (x = 0.25, 0.50, and 0.75) were prepared by melting stoichiometric amounts of lead (99.999 pct), tin (99.98 pct), and tellurium (99.999 pct) in evacuated and sealed Vycor tubes. Because of the deviation of tin telluride from the stoichiometric composition5 this compound was prepared by melting 49.8 at. pct Sn and 50.2 pct Te. The tubes containing the melts were quenched into water; the solidified ingots were removed from the tubes and annealed for 2 weeks in vacuum (PbTe approximately 100°C below its melting point, the three alloys 100°C below their solidus tem-

Jan 1, 1969

By d&apos, L. Berenbaum, F. Heurle, R. Rosenberg

The structure of aluminum films obtained by evaporation was studied by electron microscopy, mostly by replica techniques and X-ray diffraction. The resistivities and stress conditions of the films were also determined. Film properties were studied as a function of source selection, substrate type, residual pressures of oxygen and water vapor, substrate temperature, and rate of growth. The formation of abnormal localized growths and whiskers resulting from annealing treatment subsequent to deposition was investigated. Films deposited onto single-crystal substrates were found to be epitaxially 0riented; for such films, relative orientations between films and substrates were determined. ALTHOUGH wide use has been made of evaporated aluminum films for the formation of conducting lines on semiconductor devices, relatively little has been reported concerning the structural characteristics of such films.1"9 The purpose of this study was to obtain an overall view of the dependence of these characteristics on film deposition and subsequent annealing conditions, which were similar to those used in silicon planar technology. Accordingly, most of this study was carried out using oxidized and bare silicon wafers as substrates, although some work was also done using alkali halide, magnesium oxide, and mica substrates. However, the main concern remained pragmatic. Emphasis was given to the study of the effects of deposition and annealing conditions on film characteristics such as structure, resistivity, and stress. I) EXPERIMENTAL PROCEDURES The films which were investigated in this study were deposited in 18-in.-diam glass chambers which were connected to the usual type of trapped diffusion pumps filled with silicon oil. Through the use of liquid-nitrogen-cooled Meisner traps and titanium sublimation pumps placed inside the deposition chambers, the pressure could be lowered to the lower portion of the 10- I Torr range and little increase in pressure would occur during the deposition cycle. Unless described otherwise, the substrates were 1-in.-diam p-type silicon wafers having a resistivity of 10 ohm-cm. The wafers were oxidized in wet oxygen at 975°C followed by a short dry-oxygen exposure at the same tempertture to a total oxide thickness of approximately 6000A. The wafers, backed by a layer of gallium, were mounted onto molybdenum discs brazed to a copper block.10 The latter was heated by imbedded commercial cartridge heaters. The substrate temperature could be maintained to within +10°C of a prescribed temperature during film deposition. The search for a satisfactory source for the controlled evaporation of aluminum has led to the use of 1-in.-diam crucibles" machined from rods of a commercially available, refractory composite* of Bn and

Jan 1, 1969

By E. W. Mehal, R. H. Cox

A planar Gunn oscillator was developed for use in a monolithic microwave integrated circuit. The device was designed to operate in the frequency range of 20 to 30 GHz with a continuous wave output. Selective epitaxial deposition was used to form the n+n-n+ device structure in (111)-B semi-insuluting GaAs. The active n- region was about 5 µ thick and was doped to about 2 x 1015 electrons per cu cm by the reactor background. The mobility was -5000 sq cm v-1 sec-1. The n+ epitaxial deposits were doped to 1 x 10" electrons per cu cm using S2Cl2. Planarity of the three DURING the past few years, new microwave devices in discrete form have been developed utilizing GaAs. The next logical step is to combine these devices in a successive deposits was quite good; total overgrowth was less than 1 µ. Metal ohmic contacts were applied to the n+ or n- regions using a Ag-In-Ge alloy. The n+n-n+ devices had symmetric IV characteristics and could be operated C. W. for both directions of device bias. Metal ohmic contacts made directly to the n-region always Produced asymmetric devices. C. W. operation was obtained over the 22 to 28 GHz frequency range. The best performance obtained was 1.5 mw C. LV. output at 28 GHz. microwave integrated circuit. A potential application would be a radar receiver operating in the millimeter wavelength region. The key component in such an integrated circuit is a microwave oscillator, recently described by Gunn.1, 2 Under the influence of a large electric field, high-resistivity GaAs exhibits a bulk negative resistance, and high-frequency current oscillations result. Since relatively high voltage and

Jan 1, 1969

By E. H. Snow, B. E. Deal

Instability effects in semicanductor devices have long been attributed to the motion of charges on or within oxide layers on the surface. These effects are of critical importance in metal-insulator-semiconductor MIS) field-effect devices. For this reason, the capacitance-voltage or the conductance-voltage characteristic of these devices can be used as a sensitive detector to study charge transport and polarization effects in the oxide or insulator. A review is given of the results of such studies of thermally grown SiO2 as well as of other insulating films of importance in silicon technology. Three types of effects are distinguished. The first of these is the drift of mobile cations within the dielectric, examples being thermally grown SiO, which is often contaminated with sodium ions, and a variety of other glasses in which the mobile ions are a part of the glass composition. The second effect is a dipole-type polarization which occurs in phosphosilicate glass films obtained by reacting P2O5 with thermally grown SiO2. The third effect involves the transfer of charges between the dielectric and the silicon electrode. This occurs in silicon nitride and other deposited dielectrics. It is concluded that MIS studies have provided a powerful technique joy the study of charge transport and polarization effects in insulating films. The knowledge gained from these studies has led to an understanding of surface effects on conventional transistors and diodes as well as making possible stable MIS transistors. THE metal-insulator-semiconductor field-effect transistor is conceptually the oldest type of active semiconductor device.&apos; The earliest attempts at making this device were frustrated because of high surface state densities at the interface between the semiconductor and the gate insulation.&apos; However, by using a silicon substrate with thermally produced silicon dioxide as the gate insulation, this problem was solved and metal-silicon dioxide-silicon devices with good characteristics were made as early as 1960. 3 Yet it was still over 5 years before these devices became a commercial reality. This delay was largly due, not to surface states, but to stability problems associated with polarization effects within the insulating layer which caused the threshold voltage of the device to drift under temperature and bias treatments. The solution to these problems has not only made possible stable MIS devices, but it has added immensely to our understanding of failure mechanisms in conventional bipolar transistors and has added to the reliability of ali types of planar devices. In this review, we shall first describe the effects of various types of polarization phenomena on MIS device characteristics. Then, since thermally grown SiO, is by far the most important insulator used in these devices, we shall review historically the type of instabilities which have been observed in thermal oxides, the attempts at understanding and eliminating them, and the present status of the problem. We shall then turn our attention to the various deposited insulators which have been used, including lead glasses, phosphosilicate glass, vapor-deposited silicon oxide, and silicon nitride. Interestingly enough, many of these materials show polarization effects which are quite different from those generally observed in thermally grown SiO2. THE EFFECTS OF POLARIZATION PHENOMENA ON MIS CHARACTERISTICS The simplest MIS device and the one which has been most frequently used in the study of polarization effects is the MIS capacitor. Two modifications of this structure with single- and double-layer dielectrics are illustrated in Figs. l(a) and (b), respectively. The capacitance of this structure as a function of voltage applied to the metal gate electrode is plotted in Fig. 2 for the case of an n-type silicon substrate. When the silicon surface is accumulated (positive bias) the measured capacitance is just that of the insulating layer C. When the surface is inverted (negative bias), the capacitance is that of the insulator and a silicon depletion layer in series CoCs/(Co + Cs). Indicated on the horizontal axis of Fig. 2 is the voltage VT at which the silicon surface becomes strongly inverted. This voltage corresponds to the threshold or turn-on

Jan 1, 1969

By M. L. Hammond, G. M. Bowers

Silicon dioxide films have been prepared on silicon wafers by the oxidation of SiH, near 400°C. Results previously reported by Goldsmith and Kern7 have been qualitatively corrobovated using a system of different geometry, and significantly greater deposition rates have been achieved. The deposition rate is independent of thickness and nearly independent of the O2/SiH, ratio over a wide range; however, the rate is strongly temperature-dependent. The structure of the deposit depends upon the cleanliness of the substrate, and the electrical field strength of the deposited oxide depends upon the nature of the electrodes. MULTILEVEL interconnects in integrated circuits using aluminum metallization require an insulator that can be deposited at low temperature. Because the A1-Si eutectic is only 577°C, the maximum deposition temperature must be below about 500°C to prevent reaction of the aluminum with the silicon and with other materials in the integrated circuit. Many methods of depositing insulating films of SiO, and other dielectrics have been reported&apos;-6 but the technique described by Goldsmith and Kern7 offers the simplest method of preparing SiO, films. The technique involves the reaction of SiH, and 0, to form SiO, films in the 300" to 500°C temperature range. Previous work using this gas system has been reported8 and the initial development work at Philco Microelectronics was done at the East Coast R&D Laboratories. 9 This paper corroborates some of the results of Goldsmith and Kern,7 shows that much higher deposition rates can be obtained than previously reported, and presents some observations on the structure of deposited SiO, films. EXPERIMENTAL CONDITIONS Fig. 1 is a schematic drawing of the apparatus used in this study. It differs from that of Goldsmith and Kern in that 1) the gases are mixed before they enter the reaction chamber, 2) there is no fritted glass diffuser, and 3) the wafers are stationary during deposition. The control thermocouple was in a well located 0.06-in. from the substrate, and three gas supplies were used: 1 pct SiH4 in N 2, O 2, and N 2. Water vapor must be excluded from the plumbing to prevent the formation of colloidal SiO, and the SiH4 must be diluted with an inert gas because SiH4-0, mixtures are extremely flammable above about 4 pct SiH The wafer temperature was determined by attaching a thermocouple to a test wafer and the temperature was maintained to +5 C. The conditions used in this investigation are listed in Table I. The temperature range was chosen for compatibility with the A1-Si system. The volume ratio of 0, to SiH4 is the actual volume of 0, delivered to that of SiH4, taking into account the initial dilution of the SiH4. This ratio, which was used by Goldsmith and Kern,7 is a useful indicator of the experimental conditions. The active/inactive ratio is the ratio of the volume of active gases, SiH4 and O2, delivered to the volume of dilution gas. The active/inactive ratio is an important parameter to specify for deposition rate determinations since it determines the amounts of reactants that arrive at the sample per unit time. Fairly high dilution ratios were necessary to achieve uniform deposits of SiO,. Most of the process characterizations were performed on the polished (111) face of 3 to 5 ohm-cm, n-type silicon wafers which were 0.009 in. thick; but the data approximately apply to deposition of SiO, on thin films of aluminum. It is difficult to obtain accurate deposition rate data over aluminum films because of coarsening the aluminum surface during exposure to 300" to 400°C. The deposited SiO, film fol-

Jan 1, 1969

By I. H. Pratt

The results of a study on the preparation of thin-film capacitor structures are discussed. The dietectric source material was quartz which was sputtered and deposited onto aluminum electrodes and counter-electroded to complete the metal-oxide-metal structures. This configuration was utilized to evaluate the dielectric, the device characteristics, and related process parameters. The effect of gas sputtering pressure, magnetic field strength, source-to-substrate distance, and power density on the rate of deposition is shown. Increased film thickness uniformity over a 3 by 3 in. area by optimum substrate positioning is indicated. Dielectric constant, dissipation factor, dielectric breakdown strength, insulation resistance, heat treatment, capacitance, and dissipation over the range 400 Hz to 5 MHz are reported. In the fabrication of silicon-integrated circuits, silicon dioxide has found use as a material suitable as a diffusion mask, for surface passivation of the silicon, and for protection of conductive films used for interconnections. Its use as a dielectric for thin-film capacitors in film hybrid circuits has been limited, to a degree, for lack of a compatible processing technique and because of its relatively low dielectric constant. With the recent advent of practical metal-oxide-semiconductor (MOS) field effect devices, the material is now being used to insulate the gate electrode from the conducting channel in the silicon. In this latter application, more stringent requirements have been imposed on .the oxide. A comprehensive resume of the use of silicon dioxide in integrated silicon device technology has been compiled including oxide film and bulk properties, method of oxide formations, and their applications.&apos; A relatively new process to deposit SiO, and other dieIectrics is by rf sputtering, and the purpose of this paper is to describe the behavior of capacitors fabricated with a dielectric which has been sputtered from a quartz target and to indicate the relative effect of several of the process parameters on the film deposition. Work on rf sputtering of SiO2 and other dielectrics has been reported utilizing a triode type of sputtering system as described herein or a diode self-sustained glow discharge system. 2-8 SPUTTERING The process occurs during an electrical discharge in a gas plasma which provides the ions for acceleration to the target to produce the desired sputtering. The necessary plasma can be generated by a dc glow discharge through application of a high potential between two electrodes at approximately 2 to 10 x 10-2

Jan 1, 1969

By H. C. Casey, M. B. Panish

The roles of the phase diagram and the diffusion and solubility analyses in the selection of sources for the diffusion of zinc into GaAs are discussed. Isothermal sections of- the phase diagram are described at 1000°, 775°, 744°, and 700°. Below 744° the three solid phases, Zn3As2, GaAs, and ZnAsz, may be in equilibrium. In the composition regions where the three solid phases are in equilibrium, the partial pressures of the components do not vary with composition and there is no liquid phase. A diffusion source composition within that region containing 5, 50, and 45 at. pct Ga, As, and Zn was selected to yield reproducible diffusion profiles without surface damage. The 5/50/45 ternary source Provides a significant improvement in the reproducibility and planarity of- the zinc diffusion as compared with other zinc diffusion sources that result from starting with elemental zinc, dilute solutions of zinc in gallium, or various combinations of zinc and arsenic. Several experimental diffision profiles for the 5/50/45 diffusion source have been determined. The profiles are very steep in the region of the junction and produce devices that exhibit step junction behavior. The junction depth varies as the square root of time. Diffusion at 700°C for 4 hr gives a 5-µ junction depth and a surface concentration of 2.4 x1020 cm-3. The surface concentration is enhanced by a factor of three and the junction depth decreased by a factor of ten as compared with diffusion with a starting source 01- elemental zinc. The differences in dijyusion behavior with these two sources are due primarily to the approximately 10&apos; greater equilibrium As4 partial pressure for the 5/50/45 source. ThE most common technique for the preparation of GaAs p-n junctions for diverse applications ranging from switching diodes to injection lasers has been to diffuse zinc into the solid from the vapor phase. The zinc impurity has generally been provided by introducing into a diffusion ampoule elemental zinc, dilute solutions of zinc in gallium, or various combinations of zinc and arsenic. For the purpose of eliminating surface deterioration, zinc has been diffused into GaAs through SiO2 films1 and from zinc-doped SiO2 films.2 During a study of the injection and recombination mechanisms in GaAs junctions, we found that these diffusion techniques either resulted in nonreproducible diffusion profiles and nonplanar junction interfaces or were extremely inconvenient to use. An unpublished report by Allen and pearson3 emphasized that an understanding of diffusion requires relating the diffusion conditions and system compositions to the ternary phase diagram. Recent studies have made it possible to relate the effect of starting source composition on the GaAs sample surface and diffusion profile reproducibility and, in addition, to estimate the expected surface concentration and zinc diffusivity. These studies include the Ga-As-Zn phase diagram,415 the determination of the incorporation reaction for zinc as a substitutional impurity,6 and the analysis of the concentration dependence of the diffusion coefficient.&apos; In this paper the role of the phase diagram in the selection of the starting diffusion source composition is illustrated, and an application of the diffusion and solubility analyses is used to demonstrate their utility in the estimation of surface concentration and diffusivity for various starting source compositions. Consideration of the isothermal sections of the ternary phase diagram shows that below about 744° C a composition region exists where the three solid phases Zn3As2, GaAs, and ZnAs2 are in equilibrium without a liquid phase. In this region the partial pressures of the components do not vary with composition, and thus the surface concentration and diffusivity depend only on temperature. A diffusion source composition within that region containing 5, 50, and 45 at. pct Ga, As, and Zn was selected. As will be described in detail, this diffusion source yields reproducible diffusion profiles without surface damage, planar junction interfaces, and steep profiles that result in devices with step junction behavior. Only closed diffusion systems are considered. Open or flowing vapor systems require the maintaining of constant vapor pressures in the flowing gas and represent control problems outside the scope of this discussion.

Jan 1, 1969

By J. R. Szedon, T. L. Chu, G. A. Gruber

Amorphous adherent filnzs of silicon dioxide have been deposited on silicon substrates by the oxidation of silane at temperatures ranging from 650 to 1050C. Various diluents (argon, nitrogen, hydrogen) were used to suppress the formation of SiO2 in the gas phase. Deposition rates of the oxide were determined over the temperature range in question as functions of&apos; re-actant flow rates. Etch rate studies were used for a cursory comparison of structural properties of deposited and thermally grown oxides. From electrical evaluation of metal-insulator-silicon capacitors it was determined that the interface charge density of deposited films is similar go that of dry-oxygen-grown films in the 850° to 1050 C temperature range. Deposited films exhibit several ionic instability effects which differ in detail from those reported for thermal oxides. Stable passivating films of silicon nitride over deposited oxides appear to be practical for use in silicon planar device fabrication. Such films can be prepared under temperature conditions which have less effect on substrate impurity distributions than in the case of grown oxides. AMORPHOUS silicon dioxide (silica) is compatible with silicon in electrical properties and is the most widely used dielectric in silicon devices at present. Silica films can be prepared by the oxidation of silicon or deposited on silicon or other substrate surfaces by chemical reactions or vacuum techniques. The ability of thermally grown silicon dioxide films to passivate silicon surfaces forms one of the practical bases of the planar device technology. Properly produced and treated films of grown SiO 2 can have low densities of interface charge (-1 X 10" charges per sq cm) and can be stable as regards fast migrating ionic sgecies. 1 To maintain these properties, even with an otherwise hermetically sealed ambient, the Sia layers must be at least l000 A thick. Such thicknesses require oxidation in dry oxygen for periods of 7.8 hr at 900°C or 2 hr at 1000°C. Although oxidation in steam or wet oxygen can reduce these times to 17 and 5 min, the resulting oxides must be annealed to produce acceptable levels of interface charge., Oxidation or annealing involving moderate to high temperatures for extended periods of time can be undesirable. Under some conditions, there can be changes in the distribution of impurities within the underlying substrate. A chemical deposition technique using gaseous am-bients is particularly attractive and flexible for preparing oxide films. With a wide range of deposition rates available, films can be produced under condi- tions of time and temperature less detrimental to impurity distributions in the silicon than in the case of thermal oxidation. The pyrolysis of alkoxysilanes, the hydrolysis of silicon halides, and various modifications of these reactions are most commonly used for the deposition of silica films.3 Silica films obtained in this manner are likely to be contaminated by the by-products of the reaction, organic impurities, or hydrogen halides. The use of the oxidation of silane for the deposition process has been reported recently.4 The deposition of silica films on single-crystal silicon substrates by the oxidation of silane in a gas flow system has been studied in this work. The deposition variables studied were the crystallographic orientation of the substrate surface, the substrate temperature, and the nature of the diluent gas. The electrical charge behavior of Si-SiO2-A1 structures prepared under various conditions was investigated by capacitance-voltage (C-V) measurements of metal-insulator-semiconductor (MIS) capacitors. The experimental approaches and results are discussed in this paper. 1) DEPOSITION OF SILICA FILMS The overall reaction for the oxidation of silane is: The equilibrium constants of this reaction in the temperature range 500° to 1500°K, calculated from the JANAF thermochemical data,= are shown in Fig. 1. In addition to the large equilibrium constants, the oxidation of silane is also kinetically feasible at room temperature and above. However, the strong reactivity of silane toward oxygen tends to promote the nucleation of silica in the gas phase through homogeneous reactions, and the deposition of this silica on the substrate would yield nonadherent material. The formation of silica in the gas phase can be reduced by using low partial pressures of the reactants. Argon, hydrogen, and nitrogen were used as diluents in this work. 1.1) Experimental. The deposition of silica films by the oxidation of silane was carried out in a gas flow system using an apparatus shown schematically in Fig. 2. Appropriate flow meters and valves were used to control the flow of various reactants, i.e., argon, hydrogen, nitrogen, oxygen, and silane. Semiconductor-grade silane, argon of 99.999 pct minimum purity, oxygen of 99.95 pct minimum purity, and nitrogen of 99.997 pct minimum purity, all purchased from the Matheson Co., were used without further purification. In several instances, a silicon nitride film was deposited over the silica film. This was achieved by the nitridation of silane with ammonia using anhydrous ammonia of better than 99.99 pct purity supplied by the Matheson CO.&apos; The reactant mixture of the desired composition was passed through a Millipore filter into a horizontal water-cooled fused silica tube of 55 mm

Jan 1, 1969

By Robert K. Waits

The resistivity, temperature coefficient of resistance, stability at 200°C, and structure of annealed Si-Cr films have been studied as a function of film cowposition. Colorimetric analyses of the films indicated 20 to 60 wt pct Cr over the resistivity range of 1 to 10-4 ohm-cm. Resistors were delinealed by photolithographic etching, contacted with aluminum, and mounted in TO-5 packages. The average temperature coefjicient of resistance, a, between 50" and 150°C is related empirically to the film resistivity, p, by a (ppm per °C) = -2900 - 1140 log p (ohm-cm). Near a resistivity of 3.5 x 10-3 ohm-ctn (30 at. pct Cr) , the temperature coefficient changes from positive to negative. The temperature at which the resistance maximum occurs increases with decreasing resistivity. The conduction mechanism between —196" and +360 C appears to have two components—an activated conduction dominating a1 lord chromium content and higher temperatures and a linearly temperature-dependent conduction dominating at high chromium content and low temperatures. Electron diffraction patterns showed the films to consist of Cr3Si and amorphous silicon. Resistors thicker than 150A typically drifted less than 0.6 pct after 5000 hr stor-age at 200°C. Resistors as thin as approxinzately 80°A that had a silicon overlayer showed similar stability. Such films had sheet resistivities of 10 kilohm per square and temperature coefficients near —600 ppm per "c. THIN-FILM resistors having sheet resistivities greater than 1 kilohm per square are required in many integrated circuit applications. A process for producing such resistors should be compatible with present circuit fabrication and packaging, including exposure to maximum temperatures of 300° to 570°C during contact alloying, die-attach, and ceramic package sealing. In addition, the resistors should have a low temperature coefficient of resistance and change less than 1 pct during storage at temperatures up to 200°C for 1000 hr or longer. Reports of work beginning in 1949 at Battelle Memorial Institute indicated that, among other materials, the silicides of chromium, Cr-Co, molybdenum, tantalum, and tungsten were worthy of further study as high-stability resistive films. Later work on Si-Cr films vacuum-deposited by flash evaporation from a tungsten boat1 led to the conclusion that Si-Cr had "excellent properties for development into high- stability ... resistive elements". More recently, Si-Cr films have been vacuum-deposited from a tantalum boat,2 from a BeO-coated tantalum boat,3 by flash evaporation from an electron-beam-heated tungsten Source,4 and by triode sputtering.5 This paper describes a study of Si-Cr films vacuum-deposited by electron-beam heating of Si-Cr alloys. Resistivity, temperature coefficient of resistance, stability at 200°C, and structure were studied as a function of film composition. EXPERIMENTAL PROCEDURE Film Deposition. Si-Cr sources were prepared by vacuum-melting pressed pellets of mixtures of powdered chromium (99.9 pct, -100 mesh, Lunex Co., Pleasant Valley, Iowa) and silicon (99.99 pct, -325 mesh, United Mineral and Chemical Co., New York). A permanent-magnet focused electron-beam gun having a water-cooled copper crucible was used to heat the pellet until complete melting occurred. The mixture was then kept molten for an additional 5 min. The alloy thus formed was used as the source material for Si-Cr film depositions using the same electron-beam gun. Pieces of semiconductor-grade silicon ingots were used as sources for silicon depositions. The films were deposited within a standard vacuum evaporator having an 18-in.-diam Pyrex bell jar, a liquid-nitrogen-cooled trap, and a Consolidated Vacuum Corp. 6-in. diffusion pump containing Dow Corning DC-705 pump fluid. The substrates were thermally oxidized* silicon wafers 2 to 2.5 cm in diam. The

Jan 1, 1969

By B. N. Das, H. E. LaBelle, G. A. Wolf

ZnxHg1-xTe and GUPxAS1-x crystals have been grown from solution by a traveling heater method (THM). In a floating zone type fashion a solution zone sandwich of liquidus composition is made to migrate through feed material of solidus composition by a slow-speed movement of <0.25 mm per hr of the total charge through a stationary radiation or rf heater. ZnxHg1-xTe of composition 0 < x < 0.3 and GUPxAS1-x of composition 0.5 < x < 0.7 have thus been grown from their solution in liquid tellurium and gallium, respectively. A simplified analysis of heat and material transport is given. In this method, Proper adjustment of the temperature distribution along the liquid solution zone axis eliminates instability of the crystal growth front and constitutional supercooling. 1) ZnxHg1—xTe: The solid-solution telluride was grown in sealed quartz tubes at a temperature of 500 to 650°C. For first Preparations mechanical mixtures SINGLE crystals of solid solutions of III-V and II-VI compounds have been grown by various techniques from the melt, from the gaseous phase, or from solutions in of ZnTe and HgTe were used. X-ray determinations showed the resulting crystals to be homogeneous throughout their entire length, except for the end sections. The homogeneity is greatly improved by reusing the ingots obtained from first Preparations as feed material in subsequent crystal growth runs. Ingots of up to 4.5 cm have thus been obtained. 2) GaPxAs1-x: Crystals were grown in a EN crucible at a temperature of 1050°C. For first Preparation a mechanical mixture of Gap and GaAs was cemented together by a minimum amount of liquid gallium through "wet" grinding of Gap and GaAs crystals in the liquid metal and subsequent exuding of excess gallium by compacting of the charge in the EN crucible. Electron microprobe measurements using P-Ka and As-Ka radiation showed uniformity over a length of 0.4 cm. Properties of the various Preparations are described. liquid metals.&apos;-&apos; Their growth from the melt by passing a liquid zone of pseudobinary liquidus composition through a solid rod of solidus composition is generally a convenient method of growth of single crystals of solid solutions of homogeneous composition. This method loses much of its usefulness, however, if the melting point or the vapor pressure of the solid solution is high. In the case of a compound having a high melting

Jan 1, 1969

By Richard Birk

Rf sputtered quartz has been successfully used in multilayer interconnects for MOS devices. The target potential was 2000 v peak to peak with a frequency of 13.56 Mc per sec. The sputtering rate was approximately 60A per min with an operating pressure of argon gas at 10 to 15 p. The dielectric strength is 8.0 x 10&apos; v per cm and the pinhole density is less than 2 x 10-2 per sq mm. Infrared absorption peaks for the Si-O vibrational bands we at 9.4, 12.4, and at 22.5 p. The etch rate of the sputtered SiO2 is 1200A per min. MOS devices have been fabricated using multilayer interconnects with no degradation of electrical characteristics. MULTILAYER interconnects require an insdating film between the metal layers which can be deposited below any potential eutectic temperature. Sputtered Si4, which can be deposited with substrate temperatures below 200°C, satisfactorily meets the multilayer insulation requirements and has been used to prepare MOS circuits with multilayer interconnects. The physical and electrical properties of rf sput-

Jan 1, 1969

Jan 1, 1969